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结构体 | 宏定义 | 函数
hal_symc.c 文件参考
#include "hal_symc.h"
#include "hal_spacc_reg.h"
#include "crypto_drv_common.h"
hal_symc.c 的引用(Include)关系图:

结构体

struct  crypto_symc_entry_in
 
struct  crypto_symc_entry_out
 
struct  crypto_symc_hard_context
 

宏定义

#define crypto_memory_barrier()
 
#define SPACC_CPU_CUR   ((crypto_get_cpu_type() == CRYPTO_CPU_TYPE_SCPU) ? SPACC_CPU_TEE : SPACC_CPU_REE)
 
#define CRYPTO_SYMC_MAX_LIST_NUM   2
 
#define CRYPTO_SYMC_IN_NODE_SIZE   (sizeof(crypto_symc_entry_in) * CRYPTO_SYMC_MAX_LIST_NUM)
 
#define CRYPTO_SYMC_OUT_NODE_SIZE   (sizeof(crypto_symc_entry_out) * CRYPTO_SYMC_MAX_LIST_NUM)
 
#define CRYPTO_SYMC_NODE_SIZE   (CRYPTO_SYMC_IN_NODE_SIZE + CRYPTO_SYMC_OUT_NODE_SIZE)
 
#define CRYPTO_SYMC_NODE_LIST_SIZE   (CRYPTO_SYMC_NODE_SIZE * CRYPTO_SYMC_HARD_CHANNEL_MAX)
 
#define CRYPTO_SYMC_DFA_ENABLE_VAL   0x1
 
#define CRYPTO_SYMC_DFA_DISABLE_VAL   0xa
 
#define CACHE_LINE_SIZE   32
 
#define SYMC_COMPAT_ERRNO(err_code)   HAL_COMPAT_ERRNO(ERROR_MODULE_SYMC, err_code)
 
#define SYMC_KEY_64BIT_VAL   0
 
#define SYMC_KEY_128BIT_VAL   1
 
#define SYMC_KEY_192BIT_VAL   2
 
#define SYMC_KEY_256BIT_VAL   3
 
#define SYMC_ALG_MODE_ECB_VAL   0x1
 
#define SYMC_ALG_MODE_CBC_VAL   0x3
 
#define SYMC_ALG_MODE_CTR_VAL   0x6
 
#define SYMC_ALG_MODE_OFB_VAL   0x7
 
#define SYMC_ALG_MODE_CFB_VAL   0x8
 
#define SYMC_ALG_MODE_GCTR_VAL   0xb
 
#define SYMC_ALG_MODE_CMAC_VAL   0xc
 
#define SYMC_ALG_MODE_CBC_NOOUT_VAL   0xd
 
#define SYMC_ALG_MODE_GCTR_NOOUT_VAL   0xe
 
#define SYMC_ALG_AES_VAL   0x2
 
#define SYMC_ALG_SM4_VAL   0x5
 
#define SYMC_ALG_GHASH_VAL   0x6
 
#define SYMC_ALG_BIT_WIDTH_128BIT   0
 
#define SYMC_ALG_BIT_WIDTH_64BIT   1
 
#define SYMC_ALG_BIT_WIDTH_8BIT   1
 

函数

td_s32 hal_cipher_symc_init (td_void)
 
td_s32 hal_cipher_symc_deinit (td_void)
 
td_s32 hal_cipher_symc_lock_chn (td_u32 chn_num)
 
td_s32 hal_cipher_symc_unlock_chn (td_u32 chn_num)
 
td_s32 hal_cipher_symc_attach (td_u32 symc_chn_num, td_u32 keyslot_chn_num)
 
td_s32 hal_cipher_symc_set_key (td_u32 chn_num, const td_u8 *key, td_u32 key_len)
 
td_s32 hal_cipher_symc_set_iv (td_u32 chn_num, const td_u8 *iv, td_u32 iv_len)
 
td_s32 hal_cipher_symc_get_iv (td_u32 chn_num, td_u8 *iv, td_u32 iv_len)
 
td_s32 hal_cipher_symc_config (td_u32 chn_num, const hal_symc_config_t *symc_config)
 
td_s32 hal_cipher_symc_get_config (td_u32 chn_num, hal_symc_config_t *symc_config)
 
td_s32 hal_cipher_symc_start (td_u32 chn_num)
 
td_s32 hal_cipher_symc_done_try (td_u32 chn_num)
 
td_s32 hal_cipher_symc_done_notify (td_u32 chn_num)
 
td_s32 hal_cipher_symc_wait_done (td_u32 chn_num, td_bool is_wait)
 
td_s32 hal_cipher_symc_add_in_node (td_u32 chn_num, td_phys_addr_t data_phys_addr, td_u32 data_len, in_node_type_e in_node_type)
 
td_s32 hal_cipher_symc_add_out_node (td_u32 chn_num, td_phys_addr_t data_phys_addr, td_u32 data_len)
 
td_s32 hal_cipher_symc_enable_cenc_node (td_u32 chn_num, td_u32 is_head, td_u32 c_num, td_u32 e_num, td_u32 offset_len)
 
td_s32 hal_cipher_symc_get_tag (td_u32 chn_num, td_u8 *tag, td_u32 tag_len)
 
td_s32 hal_cipher_symc_register_wait_func (td_u32 chn_num, td_void *wait, crypto_wait_timeout_interruptible wait_func, td_u32 timeout_ms)
 
td_s32 hal_cipher_symc_debug (td_void)
 
td_s32 hal_cipher_symc_debug_chn (td_u32 chn_num)
 
td_void hal_cipher_set_chn_secure (td_u32 chn_num, td_bool dest_sec, td_bool src_sec)
 
td_s32 hal_cipher_symc_wait_func_config (td_u32 chn_num, td_bool is_enable)
 

宏定义说明

◆ CACHE_LINE_SIZE

#define CACHE_LINE_SIZE   32

◆ crypto_memory_barrier

#define crypto_memory_barrier ( )

Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.

Description: hal symc.
History:
2023-03-22, Create file.

◆ CRYPTO_SYMC_DFA_DISABLE_VAL

#define CRYPTO_SYMC_DFA_DISABLE_VAL   0xa

◆ CRYPTO_SYMC_DFA_ENABLE_VAL

#define CRYPTO_SYMC_DFA_ENABLE_VAL   0x1

◆ CRYPTO_SYMC_IN_NODE_SIZE

#define CRYPTO_SYMC_IN_NODE_SIZE   (sizeof(crypto_symc_entry_in) * CRYPTO_SYMC_MAX_LIST_NUM)

◆ CRYPTO_SYMC_MAX_LIST_NUM

#define CRYPTO_SYMC_MAX_LIST_NUM   2

◆ CRYPTO_SYMC_NODE_LIST_SIZE

#define CRYPTO_SYMC_NODE_LIST_SIZE   (CRYPTO_SYMC_NODE_SIZE * CRYPTO_SYMC_HARD_CHANNEL_MAX)

◆ CRYPTO_SYMC_NODE_SIZE

#define CRYPTO_SYMC_NODE_SIZE   (CRYPTO_SYMC_IN_NODE_SIZE + CRYPTO_SYMC_OUT_NODE_SIZE)

◆ CRYPTO_SYMC_OUT_NODE_SIZE

#define CRYPTO_SYMC_OUT_NODE_SIZE   (sizeof(crypto_symc_entry_out) * CRYPTO_SYMC_MAX_LIST_NUM)

◆ SPACC_CPU_CUR

#define SPACC_CPU_CUR   ((crypto_get_cpu_type() == CRYPTO_CPU_TYPE_SCPU) ? SPACC_CPU_TEE : SPACC_CPU_REE)

◆ SYMC_ALG_AES_VAL

#define SYMC_ALG_AES_VAL   0x2

◆ SYMC_ALG_BIT_WIDTH_128BIT

#define SYMC_ALG_BIT_WIDTH_128BIT   0

◆ SYMC_ALG_BIT_WIDTH_64BIT

#define SYMC_ALG_BIT_WIDTH_64BIT   1

◆ SYMC_ALG_BIT_WIDTH_8BIT

#define SYMC_ALG_BIT_WIDTH_8BIT   1

◆ SYMC_ALG_GHASH_VAL

#define SYMC_ALG_GHASH_VAL   0x6

◆ SYMC_ALG_MODE_CBC_NOOUT_VAL

#define SYMC_ALG_MODE_CBC_NOOUT_VAL   0xd

◆ SYMC_ALG_MODE_CBC_VAL

#define SYMC_ALG_MODE_CBC_VAL   0x3

◆ SYMC_ALG_MODE_CFB_VAL

#define SYMC_ALG_MODE_CFB_VAL   0x8

◆ SYMC_ALG_MODE_CMAC_VAL

#define SYMC_ALG_MODE_CMAC_VAL   0xc

◆ SYMC_ALG_MODE_CTR_VAL

#define SYMC_ALG_MODE_CTR_VAL   0x6

◆ SYMC_ALG_MODE_ECB_VAL

#define SYMC_ALG_MODE_ECB_VAL   0x1

◆ SYMC_ALG_MODE_GCTR_NOOUT_VAL

#define SYMC_ALG_MODE_GCTR_NOOUT_VAL   0xe

◆ SYMC_ALG_MODE_GCTR_VAL

#define SYMC_ALG_MODE_GCTR_VAL   0xb

◆ SYMC_ALG_MODE_OFB_VAL

#define SYMC_ALG_MODE_OFB_VAL   0x7

◆ SYMC_ALG_SM4_VAL

#define SYMC_ALG_SM4_VAL   0x5

◆ SYMC_COMPAT_ERRNO

#define SYMC_COMPAT_ERRNO (   err_code)    HAL_COMPAT_ERRNO(ERROR_MODULE_SYMC, err_code)

◆ SYMC_KEY_128BIT_VAL

#define SYMC_KEY_128BIT_VAL   1

◆ SYMC_KEY_192BIT_VAL

#define SYMC_KEY_192BIT_VAL   2

◆ SYMC_KEY_256BIT_VAL

#define SYMC_KEY_256BIT_VAL   3

◆ SYMC_KEY_64BIT_VAL

#define SYMC_KEY_64BIT_VAL   0

函数说明

◆ hal_cipher_set_chn_secure()

td_void hal_cipher_set_chn_secure ( td_u32  chn_num,
td_bool  dest_sec,
td_bool  src_sec 
)

◆ hal_cipher_symc_add_in_node()

td_s32 hal_cipher_symc_add_in_node ( td_u32  chn_num,
td_phys_addr_t  data_phys_addr,
td_u32  data_len,
in_node_type_e  in_node_type 
)

◆ hal_cipher_symc_add_out_node()

td_s32 hal_cipher_symc_add_out_node ( td_u32  chn_num,
td_phys_addr_t  data_phys_addr,
td_u32  data_len 
)

◆ hal_cipher_symc_attach()

td_s32 hal_cipher_symc_attach ( td_u32  symc_chn_num,
td_u32  keyslot_chn_num 
)

◆ hal_cipher_symc_config()

td_s32 hal_cipher_symc_config ( td_u32  chn_num,
const hal_symc_config_t *  symc_config 
)

◆ hal_cipher_symc_debug()

td_s32 hal_cipher_symc_debug ( td_void  )

◆ hal_cipher_symc_debug_chn()

td_s32 hal_cipher_symc_debug_chn ( td_u32  chn_num)

◆ hal_cipher_symc_deinit()

td_s32 hal_cipher_symc_deinit ( td_void  )

◆ hal_cipher_symc_done_notify()

td_s32 hal_cipher_symc_done_notify ( td_u32  chn_num)

◆ hal_cipher_symc_done_try()

td_s32 hal_cipher_symc_done_try ( td_u32  chn_num)

◆ hal_cipher_symc_enable_cenc_node()

td_s32 hal_cipher_symc_enable_cenc_node ( td_u32  chn_num,
td_u32  is_head,
td_u32  c_num,
td_u32  e_num,
td_u32  offset_len 
)

◆ hal_cipher_symc_get_config()

td_s32 hal_cipher_symc_get_config ( td_u32  chn_num,
hal_symc_config_t *  symc_config 
)

◆ hal_cipher_symc_get_iv()

td_s32 hal_cipher_symc_get_iv ( td_u32  chn_num,
td_u8 *  iv,
td_u32  iv_len 
)

◆ hal_cipher_symc_get_tag()

td_s32 hal_cipher_symc_get_tag ( td_u32  chn_num,
td_u8 *  tag,
td_u32  tag_len 
)

◆ hal_cipher_symc_init()

td_s32 hal_cipher_symc_init ( td_void  )

Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.

Description: hal symc header.
History:
2023-03-22, Create file.

◆ hal_cipher_symc_lock_chn()

td_s32 hal_cipher_symc_lock_chn ( td_u32  chn_num)

◆ hal_cipher_symc_register_wait_func()

td_s32 hal_cipher_symc_register_wait_func ( td_u32  chn_num,
td_void *  wait,
crypto_wait_timeout_interruptible  wait_func,
td_u32  timeout_ms 
)

◆ hal_cipher_symc_set_iv()

td_s32 hal_cipher_symc_set_iv ( td_u32  chn_num,
const td_u8 *  iv,
td_u32  iv_len 
)

◆ hal_cipher_symc_set_key()

td_s32 hal_cipher_symc_set_key ( td_u32  chn_num,
const td_u8 *  key,
td_u32  key_len 
)

◆ hal_cipher_symc_start()

td_s32 hal_cipher_symc_start ( td_u32  chn_num)

◆ hal_cipher_symc_unlock_chn()

td_s32 hal_cipher_symc_unlock_chn ( td_u32  chn_num)

◆ hal_cipher_symc_wait_done()

td_s32 hal_cipher_symc_wait_done ( td_u32  chn_num,
td_bool  is_wait 
)

◆ hal_cipher_symc_wait_func_config()

td_s32 hal_cipher_symc_wait_func_config ( td_u32  chn_num,
td_bool  is_enable 
)