10#define HAL_SPACC_REG_H
22#define SPACC_CALC_CRG_CFG (0x8030)
24#define SPACC_IE (0x00000004)
26#define CHN_WHO_USED_CLR(used, chn) (used) &= ~(0x0fU << ((chn) * 4U))
27#define CHN_WHO_USED_SET(used, chn, who) (used) |= (td_u32)(who) << ((td_u32)(chn) * 4U)
28#define CHN_WHO_USED_GET(used, chn) ((((used) >> ((chn) * 4U))) & 0x0fU)
31#define SPACC_HASH_CHN_LOCK 0x0040
32#define SPACC_HASH_CHN_CLEAR_REQ 0x0068
33#define SPACC_INT_RAW_HASH_CLEAR_FINISH 0x0014
34#define CHANN_HASH_STATE_VAL_ADDR(id) (0xa004 + (id) * 0x80)
35#define CHANN_HASH_STATE_VAL(id) (0xa000 + (id) * 0x80)
36#define IN_HASH_CHN_CTRL(id) (0x5100 + ((id) - 1) * 0x100)
37#define IN_HASH_CHN_KEY_CTRL(id) (0x5110 + ((id) - 1) * 0x100)
38#define IN_HASH_CHN_NODE_START_ADDR_H(id) (0x5120 + ((id) - 1) * 0x100)
39#define IN_HASH_CHN_NODE_START_ADDR_L(id) (0x5124 + ((id) - 1) * 0x100)
40#define IN_HASH_CHN_NODE_LENGTH(id) (0x512c + ((id) - 1) * 0x100)
41#define IN_HASH_CHN_NODE_WR_POINT(id) (0x5130 + ((id) - 1) * 0x100)
42#define IN_HASH_CHN_NODE_RD_POINT(id) (0x5134 + ((id) - 1) * 0x100)
43#define IN_HASH_CHN_DATA_LEN(id) (0x51C0 + ((id) - 1) * 0x100)
44#define HASH_CHANN_RAW_INT 0x8600
45#define HASH_CHANN_RAW_INT_EN 0x8604
46#define TEE_HASH_CALC_CTRL_CHECK_ERR 0x8068
47#define TEE_HASH_CALC_CTRL_CHECK_ERR_STATUS 0x806c
48#define REE_HASH_CALC_CTRL_CHECK_ERR 0x8078
49#define REE_HASH_CALC_CTRL_CHECK_ERR_STATUS 0x807c
50#define PCPU_HASH_CALC_CTRL_CHECK_ERR 0x8088
51#define PCPU_HASH_CALC_CTRL_CHECK_ERR_STATUS 0x808c
52#define AIDSP_HASH_CALC_CTRL_CHECK_ERR 0x8098
53#define AIDSP_HASH_CALC_CTRL_CHECK_ERR_STATUS 0x809c
59#define SPACC_SYM_CHN_LOCK 0x0020
60#define SPACC_INT_RAW_SYM_CLEAR_FINISH 0x0008
61#define SPACC_EN_INT_RAW_SYM_CLEAR_FINISH 0x000c
62#define SPACC_SYM_CHN_CLEAR_REQ 0x0060
63#define SPACC_BUS_ERR 0x0200
64#define IN_SYM_CHN_CTRL(id) (0x4100 + ((id) - 1) * 0x100)
65#define IN_SYM_OUT_CTRL(id) (0x4104 + ((id) - 1) * 0x100)
66#define IN_SYM_CHN_KEY_CTRL(id) (0x4110 + ((id) - 1) * 0x100)
67#define IN_SYM_CHN_NODE_START_ADDR_H(id) (0x4120 + ((id) - 1) * 0x100)
68#define IN_SYM_CHN_NODE_START_ADDR_L(id) (0x4124 + ((id) - 1) * 0x100)
69#define IN_SYM_CHN_NODE_LENGTH(id) (0x412c + ((id) - 1) * 0x100)
70#define IN_SYM_CHN_NODE_WR_POINT(id) (0x4130 + ((id) - 1) * 0x100)
71#define IN_SYM_CHN_NODE_RD_POINT(id) (0x4134 + ((id) - 1) * 0x100)
72#define IN_SYM_CHN_NODE_CTRL(id) (0x4140 + ((id) - 1) * 0x100)
73#define DBG_IN_SYM_CHN_RD_ADDR_H(id) (0x41a0 + ((id) - 1) * 0x100)
74#define DBG_IN_SYM_CHN_RD_ADDR_L(id) (0x41a4 + ((id) - 1) * 0x100)
75#define DBG_IN_SYM_CHN_DATA_LEN(id) (0x41c0 + ((id) - 1) * 0x100)
77#define TEE_SYM_CALC_CTRL_CHECK_ERR 0x8060
78#define TEE_SYM_CALC_CTRL_CHECK_ERR_STATUS 0x8064
79#define REE_SYM_CALC_CTRL_CHECK_ERR 0x8070
80#define REE_SYM_CALC_CTRL_CHECK_ERR_STATUS 0x8074
81#define PCPU_SYM_CALC_CTRL_CHECK_ERR 0x8080
82#define PCPU_SYM_CALC_CTRL_CHECK_ERR_STATUS 0x8084
83#define AIDSP_SYM_CALC_CTRL_CHECK_ERR 0x8090
84#define AIDSP_SYM_CALC_CTRL_CHECK_ERR_STATUS 0x8094
86#define SYM_CHANN_RAW_INT 0x8610
87#define SYM_CHANN_RAW_INT_EN 0x8614
88#define SYM_CHANN_INT 0x8618
90#define CHANN_CIPHER_IVOUT(id) (0x9000 + (id) * 0x80)
91#define CHANN_CIPHER_DFA_EN(id) (0x9020 + (id) * 0x80)
93#define OUT_SYM_CHAN_RAW_LAST_NODE_INT 0xc000
94#define OUT_SYM_CHAN_RAW_LAST_NODE_INT_EN 0xc004
95#define OUT_SYM_CHAN_LAST_NODE_INT 0xc008
96#define OUT_SYM_CHAN_RAW_LEVEL_INT 0xc010
97#define OUT_SYM_CHAN_RAW_LEVEL_INT_EN 0xc014
98#define OUT_SYM_CHAN_LEVEL_INT 0xc018
100#define OUT_SYM_CHN_STATUS(id) (0xD004 + ((id) - 1) * 0x100)
101#define OUT_SYM_CHN_NODE_START_ADDR_H(id) (0xD020 + ((id) - 1) * 0x100)
102#define OUT_SYM_CHN_NODE_START_ADDR_L(id) (0xD024 + ((id) - 1) * 0x100)
103#define OUT_SYM_CHN_NODE_LENGTH(id) (0xD028 + ((id) - 1) * 0x100)
104#define OUT_SYM_CHN_NODE_WR_POINT(id) (0xD030 + ((id) - 1) * 0x100)
105#define OUT_SYM_CHN_NODE_RD_POINT(id) (0xD034 + ((id) - 1) * 0x100)
106#define OUT_SYM_CHN_NODE_CTRL(id) (0xD040 + ((id) - 1) * 0x100)
107#define DBG_OUT_SYM_CHN_RD_ADDR_H(id) (0xD0a0 + ((id) - 1) * 0x100)
108#define DBG_OUT_SYM_CHN_RD_ADDR_L(id) (0xD0a4 + ((id) - 1) * 0x100)
109#define DBG_OUT_SYM_CHN_NODE_LEFT_BUF_LEN(id) (0xD0a8 + ((id) - 1) * 0x100)
111#define IN_SYM_CHN0_CTRL 0x4000
112#define IN_SYM_CHN0_SPECIAL_CTRL 0x4004
113#define IN_SYM_CHN0_KEY_CTRL 0x4010
114#define IN_SYM_CHN0_IV_DATA_CTRL 0x4030
115#define IN_SYM_CHN0_IV0 0x4040
116#define IN_SYM_CHN0_IV1 0x4044
117#define IN_SYM_CHN0_IV2 0x4048
118#define IN_SYM_CHN0_IV3 0x404C
119#define IN_SYM_CHN0_DATA0 0x4050
120#define IN_SYM_CHN0_DATA1 0x4054
121#define IN_SYM_CHN0_DATA2 0x4058
122#define IN_SYM_CHN0_DATA3 0x405C
123#define CHAN0_CIPHER_DOUT0 0x8100
125#define SYMC_KEY_SIZE (32)
126#define NODE_DEPTH (2)
128#define SYMC_CFG_SECURE (0x05)
129#define SYMC_CFG_NON_SECURE (0x0A)
132#define ALG_DMA_REG (0)
133#define ALG_AES_REG (2)
134#define ALG_LEA_REG (4)
135#define ALG_SM4_REG (5)
136#define ALG_GHASH_REG (6)
137#define ALG_TDES_REG (7)
139#define MODE_ECB_REG (0x01)
140#define MODE_CBC_REG (0x03)
141#define MODE_CTR_REG (0x06)
142#define MODE_OFB_REG (0x07)
143#define MODE_CFB_REG (0x08)
144#define MODE_CCM_REG (0x09)
145#define MODE_GCM_REG (0x0A)
146#define MODE_GCTR_REG (0x0B)
147#define MODE_CMAC_REG (0x0C)
148#define MODE_CBC_NOOUT_REG (0x0D)
149#define MODE_GCTR_NOOUT_REG (0x0E)
151#define BIT_WIDTH_1_REG (2)
152#define BIT_WIDTH_8_REG (1)
153#define BIT_WIDTH_64_REG (3)
154#define BIT_WIDTH_128_REG (3)
157#define SYMC_IV_STATE_START (0)
158#define SYMC_IV_STATE_UPDATE (1)
159#define SYMC_IV_STATE_FINISH (2)
spacc_cpu_mask
Definition hal_spacc_reg.h:13
@ SPACC_CPU_TEE
Definition hal_spacc_reg.h:16
@ SPACC_CPU_PCPU
Definition hal_spacc_reg.h:17
@ SPACC_CPU_INVALID
Definition hal_spacc_reg.h:19
@ SPACC_CPU_AIDSP
Definition hal_spacc_reg.h:18
@ SPACC_CPU_REE
Definition hal_spacc_reg.h:15
@ SPACC_CPU_IDLE
Definition hal_spacc_reg.h:14
unsigned int td_u32
Definition td_type.h:38
Definition hal_spacc_reg.h:413
td_u32 reserved
Definition hal_spacc_reg.h:417
td_u32 dbg_sym_chn_rd_addr_h
Definition hal_spacc_reg.h:416
td_u32 u32
Definition hal_spacc_reg.h:420
Definition hal_spacc_reg.h:424
td_u32 u32
Definition hal_spacc_reg.h:431
td_u32 dbg_sym_chn_rd_addr_h
Definition hal_spacc_reg.h:427
td_u32 reserved
Definition hal_spacc_reg.h:428
Definition hal_spacc_reg.h:244
td_u32 hash_error_code_clr
Definition hal_spacc_reg.h:247
td_u32 error_hash_chan_id
Definition hal_spacc_reg.h:249
td_u32 u32
Definition hal_spacc_reg.h:254
td_u32 reserved_0
Definition hal_spacc_reg.h:248
td_u32 reserved_1
Definition hal_spacc_reg.h:250
Definition hal_spacc_reg.h:221
td_u32 reserved_1
Definition hal_spacc_reg.h:228
td_u32 reserved_3
Definition hal_spacc_reg.h:233
td_u32 hash_check_ss_error
Definition hal_spacc_reg.h:225
td_u32 hash_aidsp_error
Definition hal_spacc_reg.h:235
td_u32 hash_check_sm3_disable_error
Definition hal_spacc_reg.h:231
td_u32 hash_check_alg_error
Definition hal_spacc_reg.h:226
td_u32 reserved_0
Definition hal_spacc_reg.h:224
td_u32 reserved_4
Definition hal_spacc_reg.h:236
td_u32 reserved_2
Definition hal_spacc_reg.h:230
td_u32 u32
Definition hal_spacc_reg.h:240
td_u32 hash_check_sha1_disable_error
Definition hal_spacc_reg.h:232
td_u32 hash_tonly_error
Definition hal_spacc_reg.h:234
td_u32 hash_check_sc_error
Definition hal_spacc_reg.h:229
td_u32 hash_check_alg_invld_error
Definition hal_spacc_reg.h:227
Definition hal_spacc_reg.h:209
td_u32 u32
Definition hal_spacc_reg.h:217
td_u32 reserved_0
Definition hal_spacc_reg.h:213
td_u32 hash_chann_raw_int
Definition hal_spacc_reg.h:212
Definition hal_spacc_reg.h:161
td_u32 hash_chn_ss
Definition hal_spacc_reg.h:164
td_u32 reserved_0
Definition hal_spacc_reg.h:163
td_u32 reserved_1
Definition hal_spacc_reg.h:165
td_u32 hash_chn_en
Definition hal_spacc_reg.h:166
td_u32 u32
Definition hal_spacc_reg.h:168
Definition hal_spacc_reg.h:171
td_u32 reserved_2
Definition hal_spacc_reg.h:179
td_u32 reserved_1
Definition hal_spacc_reg.h:176
td_u32 hash_key_chn_id
Definition hal_spacc_reg.h:173
td_u32 hash_chn_alg_sel
Definition hal_spacc_reg.h:177
td_u32 hash_chn_alg_mode
Definition hal_spacc_reg.h:178
td_u32 hmac_vld
Definition hal_spacc_reg.h:175
td_u32 u32
Definition hal_spacc_reg.h:181
td_u32 reserved_0
Definition hal_spacc_reg.h:174
Definition hal_spacc_reg.h:197
td_u32 u32
Definition hal_spacc_reg.h:205
td_u32 hash_chn_node_rd_point
Definition hal_spacc_reg.h:200
td_u32 reserved_0
Definition hal_spacc_reg.h:201
Definition hal_spacc_reg.h:185
td_u32 hash_chn_node_wr_point
Definition hal_spacc_reg.h:188
td_u32 reserved_0
Definition hal_spacc_reg.h:189
td_u32 u32
Definition hal_spacc_reg.h:193
Definition hal_spacc_reg.h:300
td_u32 sym_chn0_req
Definition hal_spacc_reg.h:304
td_u32 reserved
Definition hal_spacc_reg.h:303
td_u32 u32
Definition hal_spacc_reg.h:307
Definition hal_spacc_reg.h:322
td_u32 reserved2
Definition hal_spacc_reg.h:329
td_u32 reserved
Definition hal_spacc_reg.h:327
td_u32 sym_chn0_first_block
Definition hal_spacc_reg.h:325
td_u32 sym_chn0_last_block
Definition hal_spacc_reg.h:326
td_u32 u32
Definition hal_spacc_reg.h:332
td_u32 sym_chn0_block_len
Definition hal_spacc_reg.h:328
Definition hal_spacc_reg.h:311
td_u32 sym_chn0_odd_even
Definition hal_spacc_reg.h:314
td_u32 reserved
Definition hal_spacc_reg.h:315
td_u32 u32
Definition hal_spacc_reg.h:318
Definition hal_spacc_reg.h:286
td_u32 reserved_2
Definition hal_spacc_reg.h:292
td_u32 sym_chn_ds
Definition hal_spacc_reg.h:291
td_u32 sym_chn_ss
Definition hal_spacc_reg.h:290
td_u32 u32
Definition hal_spacc_reg.h:296
td_u32 sym_chn_en
Definition hal_spacc_reg.h:293
td_u32 reserved
Definition hal_spacc_reg.h:289
Definition hal_spacc_reg.h:269
td_u32 sym_alg_data_width
Definition hal_spacc_reg.h:277
td_u32 reserved_2
Definition hal_spacc_reg.h:279
td_u32 u32
Definition hal_spacc_reg.h:282
td_u32 reserved
Definition hal_spacc_reg.h:273
td_u32 sym_alg_decrypt
Definition hal_spacc_reg.h:278
td_u32 sym_key_chn_id
Definition hal_spacc_reg.h:272
td_u32 sym_alg_key_len
Definition hal_spacc_reg.h:276
td_u32 sym_alg_mode
Definition hal_spacc_reg.h:275
td_u32 sym_alg_sel
Definition hal_spacc_reg.h:274
Definition hal_spacc_reg.h:470
td_u32 sym_chn_node_cnt_clear
Definition hal_spacc_reg.h:477
td_u32 u32
Definition hal_spacc_reg.h:480
td_u32 reserved_0
Definition hal_spacc_reg.h:474
td_u32 sym_chn_node_level
Definition hal_spacc_reg.h:473
td_u32 sym_chn_node_cnt
Definition hal_spacc_reg.h:475
td_u32 reserved_1
Definition hal_spacc_reg.h:476
Definition hal_spacc_reg.h:391
td_u32 reserved_1
Definition hal_spacc_reg.h:395
td_u32 sym_chn_node_length
Definition hal_spacc_reg.h:394
td_u32 u32
Definition hal_spacc_reg.h:398
Definition hal_spacc_reg.h:380
td_u32 u32
Definition hal_spacc_reg.h:387
td_u32 sym_chn_node_rd_point
Definition hal_spacc_reg.h:383
td_u32 reserved_1
Definition hal_spacc_reg.h:384
Definition hal_spacc_reg.h:358
td_u32 reserved_1
Definition hal_spacc_reg.h:362
td_u32 sym_chn_node_wr_point
Definition hal_spacc_reg.h:361
td_u32 u32
Definition hal_spacc_reg.h:365
Definition hal_spacc_reg.h:258
td_u32 sym_dma_copy
Definition hal_spacc_reg.h:261
td_u32 u32
Definition hal_spacc_reg.h:265
td_u32 reserved
Definition hal_spacc_reg.h:262
Definition hal_spacc_reg.h:336
td_u32 reserved_1
Definition hal_spacc_reg.h:340
td_u32 u32
Definition hal_spacc_reg.h:343
td_u32 out_sym_chan_raw_int
Definition hal_spacc_reg.h:339
Definition hal_spacc_reg.h:484
td_u32 reserved_0
Definition hal_spacc_reg.h:488
td_u32 out_sym_chn_node_level
Definition hal_spacc_reg.h:487
td_u32 u32
Definition hal_spacc_reg.h:491
Definition hal_spacc_reg.h:402
td_u32 reserved_1
Definition hal_spacc_reg.h:406
td_u32 u32
Definition hal_spacc_reg.h:409
td_u32 sym_chn_node_length
Definition hal_spacc_reg.h:405
Definition hal_spacc_reg.h:369
td_u32 sym_chn_node_rd_point
Definition hal_spacc_reg.h:372
td_u32 u32
Definition hal_spacc_reg.h:376
td_u32 reserved_1
Definition hal_spacc_reg.h:373
Definition hal_spacc_reg.h:347
td_u32 reserved_1
Definition hal_spacc_reg.h:351
td_u32 sym_chn_node_wr_point
Definition hal_spacc_reg.h:350
td_u32 u32
Definition hal_spacc_reg.h:354
Definition hal_spacc_reg.h:632
unsigned int reserved_0
Definition hal_spacc_reg.h:636
unsigned int u32
Definition hal_spacc_reg.h:643
unsigned int spacc_ie_tee
Definition hal_spacc_reg.h:637
unsigned int spacc_ie_ree
Definition hal_spacc_reg.h:635
unsigned int reserved_2
Definition hal_spacc_reg.h:640
unsigned int spacc_ie_hpp
Definition hal_spacc_reg.h:639
unsigned int reserved_1
Definition hal_spacc_reg.h:638
Definition hal_spacc_reg.h:506
td_u32 reserved_0
Definition hal_spacc_reg.h:510
td_u32 int_raw_sym_clear_finish
Definition hal_spacc_reg.h:509
td_u32 u32
Definition hal_spacc_reg.h:513
Definition hal_spacc_reg.h:623
td_u32 sec_dfa_en
Definition hal_spacc_reg.h:625
td_u32 reserved
Definition hal_spacc_reg.h:626
td_u32 u32
Definition hal_spacc_reg.h:628
Definition hal_spacc_reg.h:495
td_u32 sym_chn_clear_req
Definition hal_spacc_reg.h:498
td_u32 reserved_0
Definition hal_spacc_reg.h:499
td_u32 u32
Definition hal_spacc_reg.h:502
Definition hal_spacc_reg.h:457
td_u32 reserved1
Definition hal_spacc_reg.h:463
td_u32 u32
Definition hal_spacc_reg.h:466
td_u32 sym_error_code_clr
Definition hal_spacc_reg.h:460
td_u32 reserved
Definition hal_spacc_reg.h:461
td_u32 error_sym_chan_id
Definition hal_spacc_reg.h:462
Definition hal_spacc_reg.h:435
td_u32 calc_ctrl_check_ss_error
Definition hal_spacc_reg.h:439
td_u32 calc_ctrl_tonly_error
Definition hal_spacc_reg.h:448
td_u32 reserved2
Definition hal_spacc_reg.h:450
td_u32 calc_ctrl_check_key_size_error
Definition hal_spacc_reg.h:445
td_u32 calc_ctrl_aidsp_error
Definition hal_spacc_reg.h:449
td_u32 calc_ctrl_check_alg_invld_error
Definition hal_spacc_reg.h:441
td_u32 calc_ctrl_big_key_info_diff_error
Definition hal_spacc_reg.h:447
td_u32 calc_ctrl_check_sc_error
Definition hal_spacc_reg.h:444
td_u32 calc_ctrl_check_dec_error
Definition hal_spacc_reg.h:442
td_u32 reserved
Definition hal_spacc_reg.h:446
td_u32 u32
Definition hal_spacc_reg.h:453
td_u32 calc_ctrl_check_alg_error
Definition hal_spacc_reg.h:440
td_u32 calc_ctrl_check_ds_error
Definition hal_spacc_reg.h:438
td_u32 reserved0
Definition hal_spacc_reg.h:443
Definition hal_spacc_reg.h:572
td_u32 sym_chan0_finish_int
Definition hal_spacc_reg.h:575
td_u32 reserved_0
Definition hal_spacc_reg.h:576
td_u32 u32
Definition hal_spacc_reg.h:579
Definition hal_spacc_reg.h:561
td_u32 reserved_0
Definition hal_spacc_reg.h:565
td_u32 sym_chan0_finish_int_en
Definition hal_spacc_reg.h:564
td_u32 u32
Definition hal_spacc_reg.h:568
Definition hal_spacc_reg.h:550
td_u32 reserved_0
Definition hal_spacc_reg.h:554
td_u32 u32
Definition hal_spacc_reg.h:557
td_u32 sym_chan0_finish_raw_int
Definition hal_spacc_reg.h:553
Definition hal_spacc_reg.h:613
td_u32 reserved_0
Definition hal_spacc_reg.h:617
td_u32 u32
Definition hal_spacc_reg.h:620
td_u32 sym_chan_err_int
Definition hal_spacc_reg.h:616
Definition hal_spacc_reg.h:594
td_u32 u32
Definition hal_spacc_reg.h:601
td_u32 sym_chan_err_int_en
Definition hal_spacc_reg.h:597
td_u32 reserved_0
Definition hal_spacc_reg.h:598
Definition hal_spacc_reg.h:583
td_u32 sym_chan_raw_err_int
Definition hal_spacc_reg.h:586
td_u32 reserved_0
Definition hal_spacc_reg.h:587
td_u32 u32
Definition hal_spacc_reg.h:590
Definition hal_spacc_reg.h:539
td_u32 u32
Definition hal_spacc_reg.h:546
td_u32 reserved_0
Definition hal_spacc_reg.h:543
td_u32 sym_chann_int
Definition hal_spacc_reg.h:542
Definition hal_spacc_reg.h:528
td_u32 sym_chann_int_en
Definition hal_spacc_reg.h:531
td_u32 u32
Definition hal_spacc_reg.h:535
td_u32 reserved_0
Definition hal_spacc_reg.h:532
Definition hal_spacc_reg.h:517
td_u32 reserved_0
Definition hal_spacc_reg.h:521
td_u32 u32
Definition hal_spacc_reg.h:524
td_u32 sym_chann_raw_int
Definition hal_spacc_reg.h:520
Definition hal_spacc_reg.h:604
td_u32 u32
Definition hal_spacc_reg.h:609
td_u32 chann_dfa_en
Definition hal_spacc_reg.h:606
td_u32 reserved
Definition hal_spacc_reg.h:607