WS63 SDK 文档 7021f4f@fbb_ws63
ws63 和 ws63e 解决方案的 SDK 文档
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pwm_porting.c 文件参考
#include "chip_core_irq.h"
#include "soc_osal.h"
#include "common_def.h"
#include "hal_pwm_v151.h"
#include "platform_core.h"
#include "pwm_porting.h"
pwm_porting.c 的引用(Include)关系图:

宏定义

#define BUS_CLOCK_TIME_40M   40000000UL
 
#define BIT_WIDTH_LIMIT   0xFFFF
 
#define CLDO_CRG_CLK_SEL   0x44001134
 
#define PWM_CKSEL_BIT   7
 

函数

uintptr_t pwm_porting_base_addr_get (void)
 Get the base address of a specified PWM.
 
void pwm_port_register_hal_funcs (void)
 Register hal funcs objects into hal_pwm module.
 
void pwm_port_unregister_hal_funcs (void)
 Unregister hal funcs objects from hal_pwm module.
 
void pwm_port_clock_enable (bool on)
 Set the divider number of the peripheral device clock.
 
void pwm_port_register_irq (pwm_channel_t channel)
 Register the interrupt of pwm.
 
void pwm_port_unregister_irq (pwm_channel_t channel)
 Unregister the interrupt of pwm.
 
void pwm_irq_lock (uint8_t channel)
 Lock of pwm interrupt.
 
void pwm_irq_unlock (uint8_t channel)
 Unlock of pwm interrupt.
 
uint32_t pwm_port_get_clock_value (pwm_channel_t channel)
 Get pwm clock value.
 
errcode_t pwm_port_param_check (const pwm_config_t *cfg)
 

变量

uintptr_t g_pwm_base_addr = (uintptr_t)PWM_0_BASE
 

宏定义说明

◆ BIT_WIDTH_LIMIT

#define BIT_WIDTH_LIMIT   0xFFFF

◆ BUS_CLOCK_TIME_40M

#define BUS_CLOCK_TIME_40M   40000000UL

Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2022. All rights reserved.

Description: Provides pwm port
History:
2022-09-16, Create file.

◆ CLDO_CRG_CLK_SEL

#define CLDO_CRG_CLK_SEL   0x44001134

◆ PWM_CKSEL_BIT

#define PWM_CKSEL_BIT   7

变量说明

◆ g_pwm_base_addr

uintptr_t g_pwm_base_addr = (uintptr_t)PWM_0_BASE