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WS63 SDK 文档 7021f4f@fbb_ws63
ws63 和 ws63e 解决方案的 SDK 文档
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This union represents the bit fields in the DMA channel interrupt. Read the register into the d32 member then set/clear the bits using the b elements. 更多...
#include <hal_dmac_v151_regs_def.h>
成员变量 | ||
| uint32_t | d32 | |
| struct { | ||
| uint32_t ch_0: 1 | ||
| uint32_t ch_1: 1 | ||
| uint32_t ch_2: 1 | ||
| uint32_t ch_3: 1 | ||
| uint32_t ch_4: 1 | ||
| uint32_t ch_5: 1 | ||
| uint32_t ch_6: 1 | ||
| uint32_t ch_7: 1 | ||
| } | b | |
This union represents the bit fields in the DMA channel interrupt. Read the register into the d32 member then set/clear the bits using the b elements.
| struct { ... } dam_ch_int_data::b |
Register bits.
| uint32_t dam_ch_int_data::ch_0 |
Channel 0 interrupt register.
| uint32_t dam_ch_int_data::ch_1 |
Channel 1 interrupt register.
| uint32_t dam_ch_int_data::ch_2 |
Channel 2 interrupt register.
| uint32_t dam_ch_int_data::ch_3 |
Channel 3 interrupt register.
| uint32_t dam_ch_int_data::ch_4 |
Channel 4 interrupt register.
| uint32_t dam_ch_int_data::ch_5 |
Channel 5 interrupt register.
| uint32_t dam_ch_int_data::ch_6 |
Channel 6 interrupt register.
| uint32_t dam_ch_int_data::ch_7 |
Channel 7 interrupt register.
| uint32_t dam_ch_int_data::d32 |
Raw register data.