This union represents the bit fields in the sio_mode register. Read the register into the d32 member then set/clear the bits using the b elements. 更多...

#include <hal_sio_v151_regs_def.h>

成员变量
uint32_t	d32

struct {

uint32_t mode: 1

uint32_t pcm_mode: 1

uint32_t rxws_select: 1

uint32_t ext_rec_en: 1

uint32_t chn_num: 2

uint32_t clk_edge: 1

uint32_t cfg_i2s_ms_mode_sel: 1

uint32_t reserved8_31: 22

}	b

详细描述

This union represents the bit fields in the sio_mode register. Read the register into the d32 member then set/clear the bits using the b elements.

结构体成员变量说明

◆ [struct]

struct { ... } sio_v151_mode_data::b

Register bits.

◆ cfg_i2s_ms_mode_sel

uint32_t sio_v151_mode_data::cfg_i2s_ms_mode_sel

SIO mode is master/slave.

◆ chn_num

uint32_t sio_v151_mode_data::chn_num

This bit indicates receive channel. 00: 2 channel. 01: 4 channel. 10: 8 channel. 11: 16 channel

◆ clk_edge

uint32_t sio_v151_mode_data::clk_edge

This bit indicates clock edge. 0: rising edge. 1: descending edge.

◆ d32

uint32_t sio_v151_mode_data::d32

Raw register data.

◆ ext_rec_en

uint32_t sio_v151_mode_data::ext_rec_en

This bit indicates sio mode. 0: standard receive mode. 1: multi-channel receive mode.

◆ mode

uint32_t sio_v151_mode_data::mode

sio mode. 0: i2s mode. 1: pcm mode.

◆ pcm_mode

uint32_t sio_v151_mode_data::pcm_mode

This bit indicates pcm time mode. 0: i2s mode. 1: self-defined mode.

◆ reserved8_31

uint32_t sio_v151_mode_data::reserved8_31

Reserved.

◆ rxws_select

uint32_t sio_v151_mode_data::rxws_select

select rx mode ws.

该联合体的文档由以下文件生成:

src/drivers/drivers/hal/sio/hal_sio_v151/hal_sio_v151_regs_def.h