pwm_offset_h_data联合体 参考

This union represents the bit fields in the pwm_offset_high register. Read the register into the d32 member then set/clear the bits using the b elements. 更多...

#include <hal_pwm_v151_regs_def.h>

成员变量
uint32_t	d32
struct {
uint32_t   pwm_offset_h_j: 16
uint32_t   reserved1_31: 16
}	b

详细描述

This union represents the bit fields in the pwm_offset_high register. Read the register into the d32 member then set/clear the bits using the b elements.

结构体成员变量说明

[struct]

struct { ... } pwm_offset_h_data::b

d32

uint32_t pwm_offset_h_data::d32

Raw register data.

pwm_offset_h_j

uint32_t pwm_offset_h_data::pwm_offset_h_j

The high 16 bits of the pwm phase control counter, +1 after the pwm_offset_l count is full, controls the position of the pwm at 1 in a cycle. For PWM, the value range is 1 to 65535. Each channel of PWM corresponds to an offset parameter.

reserved1_31

uint32_t pwm_offset_h_data::reserved1_31

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该联合体的文档由以下文件生成:

• src/drivers/drivers/hal/pwm/v151/hal_pwm_v151_regs_def.h