sio_v150_ct_clr_data联合体 参考

This union represents the bit fields in the sio_ct_clr register. Read the register into the d32 member then set/clear the bits using the b elements. 更多...

#include <hal_sio_v150_regs_def.h>

成员变量
uint32_t	d32
struct {
uint32_t   tx_fifo_threshold: 4
uint32_t   rx_fifo_threshold: 4
uint32_t   tx_data_merge_en: 1
uint32_t   rx_data_merge_en: 1
uint32_t   tx_fifo_disable: 1
uint32_t   rx_fifo_disable: 1
uint32_t   tx_enable: 1
uint32_t   rx_enable: 1
uint32_t   intr_en: 1
uint32_t   rst_n: 1
uint32_t   reserved16_31: 16
}	b

详细描述

This union represents the bit fields in the sio_ct_clr register. Read the register into the d32 member then set/clear the bits using the b elements.

结构体成员变量说明

[struct]

struct { ... } sio_v150_ct_clr_data::b

Register bits.

d32

uint32_t sio_v150_ct_clr_data::d32

Raw register data.

intr_en

uint32_t sio_v150_ct_clr_data::intr_en

Global interrupt enable. 0: enable 1: disable.

reserved16_31

uint32_t sio_v150_ct_clr_data::reserved16_31

Reserved

rst_n

uint32_t sio_v150_ct_clr_data::rst_n

SIO channel reset.

rx_data_merge_en

uint32_t sio_v150_ct_clr_data::rx_data_merge_en

RX data merge enable. 0: enable 1: disable.

rx_enable

uint32_t sio_v150_ct_clr_data::rx_enable

RX enable. 0: enable 1: disable.

rx_fifo_disable

uint32_t sio_v150_ct_clr_data::rx_fifo_disable

RX fifo enable. 0: enable 1: disable.

rx_fifo_threshold

uint32_t sio_v150_ct_clr_data::rx_fifo_threshold

RX fifo threshold.

tx_data_merge_en

uint32_t sio_v150_ct_clr_data::tx_data_merge_en

TX data merge enable. 0: enable 1: disable.

tx_enable

uint32_t sio_v150_ct_clr_data::tx_enable

TX enable. 0: enable 1: disable.

tx_fifo_disable

uint32_t sio_v150_ct_clr_data::tx_fifo_disable

TX fifo enable. 0: enable 1: disable.

tx_fifo_threshold

uint32_t sio_v150_ct_clr_data::tx_fifo_threshold

TX fifo threshold.

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该联合体的文档由以下文件生成:

• src/drivers/drivers/hal/sio/hal_sio_v150/hal_sio_v150_regs_def.h