WS63 SDK 文档 7021f4f@fbb_ws63
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bus_dma_ctrl联合体 参考

This union represents the bit fields in the SFC bus dma ctrl Register.
Read the register into the d32 member then set/clear the bits using the b elements. 更多...

#include <hal_sfc_v150_regs_def.h>

成员变量

uint32_t d32
 
struct { 
 
   uint32_t   dma_start: 1 
 
   uint32_t   dma_rw: 1 
 
   uint32_t   reserved0: 2 
 
   uint32_t   dma_sel_cs: 1 
 
   uint32_t   reserved1: 27 
 
b 
 
struct { 
 
   uint32_t   dma_start: 1 
 
   uint32_t   dma_rw: 1 
 
   uint32_t   reserved0: 2 
 
   uint32_t   dma_sel_cs: 1 
 
   uint32_t   reserved1: 27 
 
b 
 

详细描述

This union represents the bit fields in the SFC bus dma ctrl Register.
Read the register into the d32 member then set/clear the bits using the b elements.

结构体成员变量说明

◆ [struct] [1/2]

struct { ... } bus_dma_ctrl::b

Register bits.

◆ [struct] [2/2]

struct { ... } bus_dma_ctrl::b

Register bits.

◆ d32

uint32_t bus_dma_ctrl::d32

Raw register data.

◆ dma_rw

uint32_t bus_dma_ctrl::dma_rw

DMA read/write indicator. 0: write; 1: read.

◆ dma_sel_cs

uint32_t bus_dma_ctrl::dma_sel_cs

CS specified by the DMA operation.

◆ dma_start

uint32_t bus_dma_ctrl::dma_start

DMA transfer enable control. Automatic return to 0 after the DMA transfer is complete.

◆ reserved0

uint32_t bus_dma_ctrl::reserved0

◆ reserved1

uint32_t bus_dma_ctrl::reserved1

该联合体的文档由以下文件生成: