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WS63 SDK 文档 7021f4f@fbb_ws63
ws63 和 ws63e 解决方案的 SDK 文档
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结构体 | |
| union | pke_lock_ctrl |
| union | pke_lock_status |
| union | pke_noise_en |
| union | pke_int_no_mask_status |
| union | pke_alarm_status |
| union | pke_failure_flag |
| union | pke_int_enable |
| union | pke_start |
| union | pke_busy |
| union | pke_dram_clr |
| union | pke_mask_rng_cfg |
| union | pke_instr_rdy |
| #define ALIGNED_TO_WORK_LEN_IN_BYTE 8 |
| #define APOS_OFFSET 4 |
| #define BPOS_OFFSET 11 |
| #define CMD_ADD_MOD 1 |
| #define CMD_MUL_MOD 0 |
| #define CMD_SUB_MOD 2 |
| #define DEFAULT_MASK_CODE 0xE69BC3A7 |
| #define MAX_RAM_SECTION 127 |
| #define OPCODE_OFFSET 0 |
| #define PKE_ALARM_STATUS (0x8c) |
| #define PKE_ALARM_STATUS_CLEAN_CODE 0x6B4A89C6 |
| #define PKE_ALARM_STATUS_EFFECTIVE_CODE 0x5 |
| #define PKE_ALARM_STATUS_INVALID_CODE 0xA |
| #define PKE_BATCH_START_CODE 0x5AA |
| #define PKE_BUSY (0x48) |
| #define PKE_DRAM_BASE (0x1000) |
| #define PKE_DRAM_BLOCK_LENGTH 32 |
| #define PKE_DRAM_CLR (0xc0) |
| #define PKE_DRAM_MASK (0xf0) |
| #define PKE_FAIL_FLAG_CNT 0xB |
| #define PKE_FAILURE_FLAG (0x90) |
| #define PKE_INSTR0 (0x04) |
| #define PKE_INSTR1 (0x08) |
| #define PKE_INSTR_ADDR_HIG (0x10) |
| #define PKE_INSTR_ADDR_LOW (0x0c) |
| #define PKE_INSTR_LEN (0x14) |
| #define PKE_INSTR_RDY (0x44) |
| #define PKE_INT_ENABLE (0x80) |
| #define PKE_INT_NOMASK_FINISH_EFFECTIVE_CODE 0x5 |
| #define PKE_INT_NOMASK_FINISH_INVALID_CODE 0xA |
| #define PKE_INT_NOMASK_STATUS (0x84) |
| #define PKE_LOCK_CTRL (0x810) |
| #define PKE_LOCK_STATUS (0x814) |
| #define PKE_MASK_RNG_CFG (0x18) |
| #define PKE_MONT_BIT_LEN 64 |
| #define PKE_MONT_PARA0 (0x20) |
| #define PKE_MONT_PARA1 (0x24) |
| #define PKE_MONT_PARAM_LEN 2 |
| #define PKE_NOISE_EN (0x4c) |
| #define PKE_NON_SPECIAL_VAL 0xA5C36987 |
Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2022. All rights reserved. Description: define the logic related register micro.
Create: 2022-12-12
| #define PKE_START (0x40) |
| #define PKE_START0_CODE 0xAA5 |
| #define PKE_START1_CODE 0xA5A |
| #define PKE_WORK_LEN (0x00) |
| #define RPOS_OFFSET 25 |
| #define TPOS_OFFSET 18 |