This union represents the bit fields in the Slave Enable Register.
Read the register into the d32 member then set/clear the bits using the b elements. 更多...

#include <hal_spi_v151_regs_def.h>

成员变量
uint32_t	d32

struct {

uint32_t frdv: 16

}	b

详细描述

This union represents the bit fields in the Slave Enable Register.
Read the register into the d32 member then set/clear the bits using the b elements.

结构体成员变量说明

◆ [struct]

struct { ... } spi_brs_data::b

Register bits.

◆ d32

uint32_t spi_brs_data::d32

Raw register data.

◆ frdv

uint32_t spi_brs_data::frdv

SPI Clock Divider.
The LSB for this field is always set to 0 and is unaffected by a write operation, which ensures an even value is held in this register. If the value is 0, the spi_slenrial output clock (sclk_out) is disabled. The frequency of the sclk_out is derived from the following equation:.
Fsclk_out = Fssi_clk/SCKDV
where SCKDV is any even value between 2 and 65534. For example:
for Fssi_clk = 3.6864MHz and SCKDV =2, Fsclk_out = 3.6864/2 = 1.8432MHz.

该联合体的文档由以下文件生成:

src/drivers/drivers/hal/spi/v151/hal_spi_v151_regs_def.h