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WS63 SDK 文档 7021f4f@fbb_ws63
ws63 和 ws63e 解决方案的 SDK 文档
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This union represents the bit fields in the sio_mode register. Read the register into the d32 member then set/clear the bits using the b elements. 更多...
#include <hal_sio_v150_regs_def.h>
成员变量 | ||
| uint32_t | d32 | |
| struct { | ||
| uint32_t mode: 1 | ||
| uint32_t pcm_mode: 1 | ||
| uint32_t reserved2: 1 | ||
| uint32_t ext_rec_en: 1 | ||
| uint32_t chn_num: 2 | ||
| uint32_t clk_edge: 1 | ||
| uint32_t reserved7_31: 25 | ||
| } | b | |
This union represents the bit fields in the sio_mode register. Read the register into the d32 member then set/clear the bits using the b elements.
| struct { ... } sio_v150_mode_data::b |
Register bits.
| uint32_t sio_v150_mode_data::chn_num |
This bit indicates receive channel in multi-channel receive mode. 00: 2 channel 01: 4 channel 10: 8 channel 11: 16 channel
| uint32_t sio_v150_mode_data::clk_edge |
This bit indicates clock edge in pcm multi-channel receive mode. 0: rising edge 1: descending edge.
| uint32_t sio_v150_mode_data::d32 |
Raw register data.
| uint32_t sio_v150_mode_data::ext_rec_en |
This bit indicates sio mode. 0: standard receive mode 1: multi-channel receive mode.
| uint32_t sio_v150_mode_data::mode |
This bit indicates sio mode. 0: i2s mode 1: pcm mode.
| uint32_t sio_v150_mode_data::pcm_mode |
This bit indicates pcm time mode. 0: i2s mode 1: self-defined mode.
| uint32_t sio_v150_mode_data::reserved2 |
Reserved
| uint32_t sio_v150_mode_data::reserved7_31 |
Reserved