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WS63 SDK 文档 7021f4f@fbb_ws63
ws63 和 ws63e 解决方案的 SDK 文档
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This union represents the bit fields in the cfg_i2s_crg register. Read the register into the d32 member then set/clear the bits using the b elements. 更多...
#include <hal_sio_v151_regs_def.h>
成员变量 | ||
| uint32_t | d32 | |
| struct { | ||
| uint32_t i2s_bclk_div_en: 1 | ||
| uint32_t i2s_crg_clken: 1 | ||
| uint32_t i2s_bclk_sel: 1 | ||
| uint32_t reserved4: 1 | ||
| uint32_t i2s_fs_sel: 1 | ||
| uint32_t reserved5_15: 11 | ||
| } | b | |
This union represents the bit fields in the cfg_i2s_crg register. Read the register into the d32 member then set/clear the bits using the b elements.
| struct { ... } sio_v151_i2s_crg_data::b |
Register bits.
| uint32_t sio_v151_i2s_crg_data::d32 |
Raw register data.
| uint32_t sio_v151_i2s_crg_data::i2s_bclk_div_en |
bclk enable signal.
| uint32_t sio_v151_i2s_crg_data::i2s_bclk_sel |
bclk phase.
| uint32_t sio_v151_i2s_crg_data::i2s_crg_clken |
bclk enable signal is invalid.
| uint32_t sio_v151_i2s_crg_data::i2s_fs_sel |
bclk phase.
| uint32_t sio_v151_i2s_crg_data::reserved4 |
Reserved.
| uint32_t sio_v151_i2s_crg_data::reserved5_15 |
Reserved.