|
WS63 SDK 文档 7021f4f@fbb_ws63
ws63 和 ws63e 解决方案的 SDK 文档
|

结构体 | |
| union | hkl_lock_ctrl |
| union | hkl_com_lock_info |
| union | hkl_com_lock_status |
| union | hkl_unlock_ctrl |
| union | kl_com_ctrl |
| union | kl_com_status |
| union | hkl_key_sec_cfg |
| union | hkl_key_addr |
| union | hkl_key_cfg |
| union | kl_clr_ctrl |
| union | hkl_nonce_ctrl |
| union | hkl_nonce_status |
| union | hkl_clr_lock_info |
| union | hkl_clr_lock_status |
| union | hkl_clr_ctrl |
| union | hkl_fp_lock_info |
| union | hkl_fp_lock_status |
| union | hkl_fp_rk_sel |
| union | hkl_fp_ctrl |
| union | hkl_fp_status |
| union | hkl_fp_dec_ctrl |
| union | hkl_ta_lock_info |
| union | hkl_ta_lock_status |
| union | hkl_ta_ctrl |
| union | hkl_ta_status |
| union | hkl_csgk2_lock_info |
| union | hkl_csgk2_lock_status |
| union | hkl_csgk2_ctrl |
| union | hkl_csgk2_disable |
| union | hkl_csgk2_disable_lock |
| union | hkl_alarm_info |
| union | sbrk_disable |
| union | abrk_disable |
| union | kl_int_cfg |
| union | kl_int_status |
| union | kl_int_raw |
| #define ABRK_DISABLE (KLAD_REG_OFFSET + 0x064) |
| #define ABRK_DISABLE_VAL 0x5 |
| #define ATTACH_FLASH 2 |
| #define ATTACH_HMAC 4 |
| #define ATTACH_MCIPHER 3 |
| #define BYTE_TO_BITS 8 |
| #define CLEAR_HMAC_KEY_BLOCK_SIZE_1024 128 |
| #define CLEAR_HMAC_KEY_BLOCK_SIZE_512 64 |
| #define CLEAR_HMAC_KEY_CAL_CNT_1024 8 |
| #define CLEAR_HMAC_KEY_CAL_CNT_512 4 |
| #define HKL_KEY_LEN 16 |
| #define HKL_KEY_LEN_32 32 |
| #define KALD_DATA_IN_REG_NUM 4 |
| #define KC_ERROR (KLAD_REG_OFFSET + 0x03c) |
| #define KDF_ABRK 6 |
| #define KDF_ABRK2 17 |
| #define KDF_ABRK_REE 20 |
| #define KDF_DFT_JTAG 0x15 |
| #define KDF_DRK 13 |
| #define KDF_FDRK 11 |
| #define KDF_FUNC_JTAG 0x13 |
| #define KDF_MDRK0 10 |
| #define KDF_MDRK1 12 |
| #define KDF_MDRK2 14 |
| #define KDF_MDRK3 15 |
| #define KDF_ODRK0 7 |
| #define KDF_ODRK1 8 |
| #define KDF_PSK 18 |
| #define KDF_RDRK 9 |
| #define KDF_RDRK_REE 22 |
| #define KDF_SBRK 5 |
| #define KDF_SBRK2 16 |
| #define KDF_SW_GEN 3 |
| #define KDF_TEE_JTAG 0x14 |
| #define KDF_USD 4 |
| #define KEY_SIZE_128_BIT 16 |
| #define KEY_SIZE_128_BIT_REG_VAL 0x1 |
| #define KEY_SIZE_192_BIT 24 |
| #define KEY_SIZE_192_BIT_REG_VAL 0x2 |
| #define KEY_SIZE_256_BIT 32 |
| #define KEY_SIZE_256_BIT_REG_VAL 0x3 |
| #define KEY_SIZE_64_BIT 8 |
Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
Description: hal klad register header.
History:
2023-03-22, Create file.
| #define KEY_SIZE_64_BIT_REG_VAL 0x0 |
| #define KL_ALARM_INFO (KLAD_REG_OFFSET + 0x600) |
| #define KL_CLR_CTRL (KLAD_REG_OFFSET + 0x438) |
| #define KL_COM_CTRL (KLAD_REG_OFFSET + 0x084) |
| #define KL_COM_LOCK_INFO (KLAD_REG_OFFSET + 0x07c) |
| #define KL_COM_LOCK_STATUS (KLAD_REG_OFFSET + 0x080) |
| #define KL_COM_STATUS (KLAD_REG_OFFSET + 0x088) |
| #define KL_CRC (KLAD_REG_OFFSET + 0x034) |
| #define KL_DATA_IN | ( | n | ) | (KLAD_REG_OFFSET + 0x000 + ((n) * 0x4)) /* n 0~3 */ |
| #define KL_DATA_IN_0 (KLAD_REG_OFFSET + 0x000) |
| #define KL_DATA_IN_1 (KLAD_REG_OFFSET + 0x004) |
| #define KL_DATA_IN_2 (KLAD_REG_OFFSET + 0x008) |
| #define KL_DATA_IN_3 (KLAD_REG_OFFSET + 0x00c) |
| #define KL_ERROR (KLAD_REG_OFFSET + 0x038) |
| #define KL_INT (KLAD_REG_OFFSET + 0x048) |
| #define KL_INT_EN (KLAD_REG_OFFSET + 0x040) |
| #define KL_INT_RAW (KLAD_REG_OFFSET + 0x044) |
| #define KL_KEY_ADDR (KLAD_REG_OFFSET + 0x010) |
| #define KL_KEY_CFG (KLAD_REG_OFFSET + 0x014) |
| #define KL_KEY_SEC_CFG (KLAD_REG_OFFSET + 0x018) |
| #define KL_LOCK_CTRL (KLAD_REG_OFFSET + 0x074) |
| #define KL_RK_GEN_STATUS (KLAD_REG_OFFSET + 0x070) |
| #define KL_STATE (KLAD_REG_OFFSET + 0x030) |
| #define KL_UNLOCK_CTRL (KLAD_REG_OFFSET + 0x078) |
| #define KLAD_CHANNEL_MAX_SUPPORT 1 |
| #define KLAD_CLEAR_KEY_INVALID_HMAC 0xff |
| #define KLAD_DEST_TYPE_AI_AUDIO 4 |
| #define KLAD_DEST_TYPE_AI_NPU 5 |
| #define KLAD_DEST_TYPE_FLASH 7 |
| #define KLAD_DEST_TYPE_INVALID 0 |
| #define KLAD_DEST_TYPE_INVALID_KSLOT 0xffffffff |
| #define KLAD_DEST_TYPE_MCIPHER 1 |
| #define KLAD_INVALID_HANDLE_INDEX (-1) |
| #define KLAD_KEY_TYPE_ABRK0 0x2 |
| #define KLAD_KEY_TYPE_ABRK1 0x3 |
| #define KLAD_KEY_TYPE_ABRK2 0x11 |
| #define KLAD_KEY_TYPE_ABRK_REE 0x15 |
| #define KLAD_KEY_TYPE_DRK0 0xc |
| #define KLAD_KEY_TYPE_DRK1 0xd |
| #define KLAD_KEY_TYPE_FDRK0 0x4 |
| #define KLAD_KEY_TYPE_MDRK0 0x8 |
| #define KLAD_KEY_TYPE_OARK0 0x6 |
| #define KLAD_KEY_TYPE_ODRK0 0x5 |
| #define KLAD_KEY_TYPE_ODRK1 0x7 |
| #define KLAD_KEY_TYPE_PSK 0x12 |
| #define KLAD_KEY_TYPE_RDRK0 0xe |
| #define KLAD_KEY_TYPE_RDRK1 0xf |
| #define KLAD_KEY_TYPE_RDRK_REE 0x17 |
| #define KLAD_KEY_TYPE_SBRK0 0x0 |
| #define KLAD_KEY_TYPE_SBRK1 0x1 |
| #define KLAD_KEY_TYPE_SBRK2 0x10 |
| #define KLAD_LOCK_REG_CONFIG_VALUE 1 |
| #define KLAD_REG_OFFSET (0x00001000) |
| #define KLAD_UNLOCK_REG_CONFIG_VALUE 1 |
| #define KLAD_UNLOCK_STATUS 0x0 |
| #define SBRK_DISABLE (KLAD_REG_OFFSET + 0x060) |
| #define SBRK_DISABLE_VAL 0x5 |