WS63 SDK 文档 7021f4f@fbb_ws63
ws63 和 ws63e 解决方案的 SDK 文档
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fe_hal_phy_reg_if_rom.h 文件参考
#include "osal_types.h"
fe_hal_phy_reg_if_rom.h 的引用(Include)关系图:

浏览源代码.

函数

osal_void hal_set_cal_rx_dc_comp_bypass_cfg_rx_dc_comp_bypass (osal_u32 cfg_rx_dc_comp_bypass)
 
osal_void hal_set_cal_rx_dc_comp_value_cfg_rx0_dc_comp_i (osal_u32 cfg_rx0_dc_comp_i)
 
osal_void hal_set_cal_rx_dc_comp_value_cfg_rx0_dc_comp_q (osal_u32 cfg_rx0_dc_comp_q)
 
osal_void hal_set_online_cfg0_online_dc_tracking_enable (osal_u32 online_dc_tracking_enable)
 
osal_void hal_set_cal_accum_en_cfg_accum_en (osal_u32 cfg_accum_en)
 
osal_void hal_set_cal_accum_times_cfg_accum_times (osal_u32 cfg_accum_times)
 
osal_u32 hal_get_cal_accum_rpt_ready_rpt_accum_ready (osal_void)
 
osal_u32 hal_get_cal_accum_i_cal0_accum_i (osal_void)
 
osal_u32 hal_get_cal_accum_q_cal0_accum_q (osal_void)
 
osal_void hal_set_cali_new_add_reg_cfg_fb_pwr_calc_prd (osal_u32 cfg_fb_pwr_calc_prd)
 
osal_void hal_set_fifoctrl_reg_rx_fifo_en (osal_u32 reg_rx_fifo_en)
 
osal_void hal_set_fifoctrl_reg_tx_fifo_en (osal_u32 reg_tx_fifo_en)
 
osal_void hal_set_wlbb_testmode_wlbb_testmode (osal_u32 wlbb_testmode)
 
osal_void hal_set_test_start_sample_done (osal_u32 sample_done)
 
osal_void hal_set_test_start_test_start (osal_u32 test_start)
 
osal_void hal_set_cal_tone_gen1_iq_cali_delay (osal_u32 iq_cali_delay)
 
osal_void hal_set_cal_tone_gen1_cfg_tone_sign (osal_u32 cfg_tone_sign)
 
osal_void hal_set_cal_tone_gen1_cfg_tone_mode_user (osal_u32 cfg_tone_mode_user)
 
osal_void hal_set_cal_tone_gen1_cfg_tone_mask (osal_u32 cfg_tone_mask)
 
osal_void hal_set_cal_tone_gen1_cfg_tone_amp (osal_u32 cfg_tone_amp)
 
osal_void hal_set_cal_tone_gen1_cfg_tone_en (osal_u32 cfg_tone_en)
 
osal_void hal_set_cal_tone_gen_ctrl2_cfg_rx_tone_pn_intvl (osal_u32 cfg_rx_tone_pn_intvl)
 
osal_void hal_set_cal_tone_gen_ctrl2_cfg_tx_tone_pn_intvl (osal_u32 cfg_tx_tone_pn_intvl)
 
osal_void hal_set_cal_tone_gen_ctrl1_cfg_trx_iq_mode (osal_u32 cfg_trx_iq_mode)
 
osal_void hal_set_cal_trx_iq_ctrl1_cfg_iq_sym_num (osal_u32 cfg_iq_sym_num)
 
osal_void hal_set_cal_fft_sa_ctrl1_cfg_cali_iq_fft_size (osal_u32 cfg_cali_iq_fft_size)
 
osal_void hal_set_cal_fft_sa_ctrl2_cfg_dfe_loop_choose (osal_u32 cfg_dfe_loop_choose)
 
osal_void hal_set_cal_trx_iq_ctrl1_cfg_trx_iq_cali_en (osal_u32 cfg_trx_iq_cali_en)
 
osal_void hal_set_cal_trxiq_fft_index_0_index0 (osal_u32 index0)
 
osal_void hal_set_cal_trxiq_fft_index_1_index1 (osal_u32 index1)
 
osal_void hal_set_cal_trxiq_fft_index_2_index2 (osal_u32 index2)
 
osal_void hal_set_cal_trxiq_fft_index_3_index3 (osal_u32 index3)
 
osal_u32 hal_get_cal_trx_iq_ctrl1_rpt_rx_fft_done (osal_void)
 
osal_u32 hal_get_cal_trxiq_fft_0_rpt_fft_idx0_di (osal_void)
 
osal_u32 hal_get_cal_trxiq_fft_0_rpt_fft_idx0_dq (osal_void)
 
osal_u32 hal_get_cal_trxiq_fft_1_rpt_fft_idx1_di (osal_void)
 
osal_u32 hal_get_cal_trxiq_fft_1_rpt_fft_idx1_dq (osal_void)
 
osal_u32 hal_get_cal_trxiq_fft_2_rpt_fft_idx2_di (osal_void)
 
osal_u32 hal_get_cal_trxiq_fft_2_rpt_fft_idx2_dq (osal_void)
 
osal_u32 hal_get_cal_trxiq_fft_3_rpt_fft_idx3_di (osal_void)
 
osal_u32 hal_get_cal_trxiq_fft_3_rpt_fft_idx3_dq (osal_void)
 
osal_void hal_set_cal_cfg9_cfg_rx_iq_comp_bypass (osal_u32 cfg_rx_iq_comp_bypass)
 
osal_void hal_set_cal_txiq_comp_ctrl_cfg_tx_iq_comp_bypass (osal_u32 cfg_tx_iq_comp_bypass)
 
osal_void hal_set_cal_tx_pwr_comp_bypass_cfg_tx_pwr_comp_bypass (osal_u32 cfg_tx_pwr_comp_bypass)
 
osal_void hal_set_tx_iq_pos_beta_comp_cfg_tx_iq_mismatch_pos_beta_real (osal_u32 cfg_tx_iq_mismatch_pos_beta_real)
 
osal_void hal_set_tx_iq_pos_beta_comp_cfg_tx_iq_mismatch_pos_beta_imag (osal_u32 cfg_tx_iq_mismatch_pos_beta_imag)
 
osal_void hal_set_tx_iq_neg_beta_comp_cfg_tx_iq_mismatch_neg_beta_real (osal_u32 cfg_tx_iq_mismatch_neg_beta_real)
 
osal_void hal_set_tx_iq_neg_beta_comp_cfg_tx_iq_mismatch_neg_beta_imag (osal_u32 cfg_tx_iq_mismatch_neg_beta_imag)
 
osal_void hal_set_rx_iq_pos_beta_comp_cfg_rx_iq_mismatch_pos_beta_real (osal_u32 cfg_rx_iq_mismatch_pos_beta_real)
 
osal_void hal_set_rx_iq_pos_beta_comp_cfg_rx_iq_mismatch_pos_beta_imag (osal_u32 cfg_rx_iq_mismatch_pos_beta_imag)
 
osal_void hal_set_rx_iq_neg_beta_comp_cfg_rx_iq_mismatch_neg_beta_real (osal_u32 cfg_rx_iq_mismatch_neg_beta_real)
 
osal_void hal_set_rx_iq_neg_beta_comp_cfg_rx_iq_mismatch_neg_beta_imag (osal_u32 cfg_rx_iq_mismatch_neg_beta_imag)
 
osal_void hal_set_cal_txiq_comp_ctrl_cfg_tx_iq_comp_sel_man (osal_u32 cfg_tx_iq_comp_sel_man)
 
osal_void hal_set_cal_cfg9_cfg_rx_iq_comp_sel_man (osal_u32 cfg_rx_iq_comp_sel_man)
 
osal_void hal_set_cal_tx_dc_comp_bypass_cfg_tx_dc_comp_bypass (osal_u32 cfg_tx_dc_comp_bypass)
 
osal_void hal_set_cal_tx_dc_en_cfg_tx_dc_en (osal_u32 cfg_tx_dc_en)
 
osal_void hal_set_cal_tx_ivalue_cfg_tx_dc_ivalue (osal_u32 cfg_tx_dc_ivalue)
 
osal_void hal_set_cal_tx_qvalue_cfg_tx_dc_qvalue (osal_u32 cfg_tx_dc_qvalue)
 
osal_void hal_set_fifo_alarm_tx_fifo_almost_full_alm_neg_0ch (osal_u32 tx_fifo_almost_full_alm_neg_0ch)
 
osal_void hal_set_wcbb_clk_sel_wp0_fft_clksel_mod (osal_u32 wp0_fft_clksel_mod)
 
osal_void hal_set_div_num_sel_wp0_tx_dfe_1dom_div_num_sel (osal_u32 wp0_tx_dfe_1dom_div_num_sel)
 
osal_void hal_set_tx_control_cfg_cont_tx_pattern (osal_u32 cfg_cont_tx_pattern)
 
osal_void hal_set_tx_control_cfg_cont_tx_frm (osal_u32 cfg_cont_tx_frm)
 
osal_void hal_set_tx_time_1dly_cfg_tx_dly_20m_time_he (osal_u32 cfg_tx_dly_20m_time_he)
 
osal_void hal_set_tx_time_1dly_cfg_tx_dly_40m_time_he (osal_u32 cfg_tx_dly_40m_time_he)
 
osal_void hal_set_tx_dfe_0dly_cfg_tx_dly_20m_time (osal_u32 cfg_tx_dly_20m_time)
 
osal_void hal_set_tx_dfe_0dly_cfg_tx_dly_40m_time (osal_u32 cfg_tx_dly_40m_time)
 
osal_void hal_set_tx_dfe_0dly_cfg_tx_dly_11b_time (osal_u32 cfg_tx_dly_11b_time)
 
osal_void hal_set_cont_tx_mode_0_cfg_tx_vector_0word (osal_u32 cfg_tx_vector_0word)
 
osal_void hal_set_cont_tx_mode_1_cfg_tx_vector_1word (osal_u32 cfg_tx_vector_1word)
 
osal_void hal_set_cont_tx_mode_2_cfg_tx_vector_2word (osal_u32 cfg_tx_vector_2word)
 
osal_void hal_set_cont_tx_mode_3_cfg_tx_vector_3word (osal_u32 cfg_tx_vector_3word)
 
osal_void hal_set_cont_tx_mode_4_cfg_tx_vector_4word (osal_u32 cfg_tx_vector_4word)
 
osal_void hal_set_cont_tx_mode_5_cfg_tx_vector_5word (osal_u32 cfg_tx_vector_5word)
 
osal_void hal_set_cont_tx_mode_6_cfg_tx_vector_6word (osal_u32 cfg_tx_vector_6word)
 
osal_void hal_set_tx_new_add3_cfg_cont_fcs (osal_u32 cfg_cont_fcs)
 
osal_void hal_set_tx_control_cfg_en_cont_tx (osal_u32 cfg_en_cont_tx)
 
osal_void hal_set_wcbb_soft_reset_reg (osal_u32 soft_rst_wp0_phy_reg_n)
 
osal_void hal_set_tx_power_accum_delay_power_accum_delay (osal_u32 power_accum_delay)
 
osal_void hal_set_dyn_tx_power_cali_dyn_tx_power_cali (osal_u32 dyn_tx_power_cali)
 
osal_u32 hal_get_cal_accum_i_rpt_accum_i_ready (osal_void)
 
osal_u32 hal_get_cal_accum_q_rpt_accum_q_ready (osal_void)
 
osal_void hal_set_dac_fs_cfg_dac_fs (osal_u32 cfg_dac_fs)
 
osal_u32 hal_get_dac_fs_cfg_dac_fs (osal_void)
 
osal_void hal_set_adc_fs_cfg_adc_fs (osal_u32 cfg_adc_fs)
 
osal_void hal_set_wcbb_clk_div_5_wp0_tx_div_num_man (osal_u32 wp0_tx_div_num_man)
 
osal_void hal_set_wcbb_clk_div_2_wp0_cali_rxdfe_agc_div_num (osal_u32 wp0_cali_rxdfe_agc_div_num)
 
osal_void hal_set_wcbb_soft_clken_sel0 (osal_u32 value)
 

函数说明

◆ hal_get_cal_accum_i_cal0_accum_i()

osal_u32 hal_get_cal_accum_i_cal0_accum_i ( osal_void  )

◆ hal_get_cal_accum_i_rpt_accum_i_ready()

osal_u32 hal_get_cal_accum_i_rpt_accum_i_ready ( osal_void  )

◆ hal_get_cal_accum_q_cal0_accum_q()

osal_u32 hal_get_cal_accum_q_cal0_accum_q ( osal_void  )

◆ hal_get_cal_accum_q_rpt_accum_q_ready()

osal_u32 hal_get_cal_accum_q_rpt_accum_q_ready ( osal_void  )

◆ hal_get_cal_accum_rpt_ready_rpt_accum_ready()

osal_u32 hal_get_cal_accum_rpt_ready_rpt_accum_ready ( osal_void  )

◆ hal_get_cal_trx_iq_ctrl1_rpt_rx_fft_done()

osal_u32 hal_get_cal_trx_iq_ctrl1_rpt_rx_fft_done ( osal_void  )

◆ hal_get_cal_trxiq_fft_0_rpt_fft_idx0_di()

osal_u32 hal_get_cal_trxiq_fft_0_rpt_fft_idx0_di ( osal_void  )

◆ hal_get_cal_trxiq_fft_0_rpt_fft_idx0_dq()

osal_u32 hal_get_cal_trxiq_fft_0_rpt_fft_idx0_dq ( osal_void  )

◆ hal_get_cal_trxiq_fft_1_rpt_fft_idx1_di()

osal_u32 hal_get_cal_trxiq_fft_1_rpt_fft_idx1_di ( osal_void  )

◆ hal_get_cal_trxiq_fft_1_rpt_fft_idx1_dq()

osal_u32 hal_get_cal_trxiq_fft_1_rpt_fft_idx1_dq ( osal_void  )

◆ hal_get_cal_trxiq_fft_2_rpt_fft_idx2_di()

osal_u32 hal_get_cal_trxiq_fft_2_rpt_fft_idx2_di ( osal_void  )

◆ hal_get_cal_trxiq_fft_2_rpt_fft_idx2_dq()

osal_u32 hal_get_cal_trxiq_fft_2_rpt_fft_idx2_dq ( osal_void  )

◆ hal_get_cal_trxiq_fft_3_rpt_fft_idx3_di()

osal_u32 hal_get_cal_trxiq_fft_3_rpt_fft_idx3_di ( osal_void  )

◆ hal_get_cal_trxiq_fft_3_rpt_fft_idx3_dq()

osal_u32 hal_get_cal_trxiq_fft_3_rpt_fft_idx3_dq ( osal_void  )

◆ hal_get_dac_fs_cfg_dac_fs()

osal_u32 hal_get_dac_fs_cfg_dac_fs ( osal_void  )

◆ hal_set_adc_fs_cfg_adc_fs()

osal_void hal_set_adc_fs_cfg_adc_fs ( osal_u32  cfg_adc_fs)

◆ hal_set_cal_accum_en_cfg_accum_en()

osal_void hal_set_cal_accum_en_cfg_accum_en ( osal_u32  cfg_accum_en)

◆ hal_set_cal_accum_times_cfg_accum_times()

osal_void hal_set_cal_accum_times_cfg_accum_times ( osal_u32  cfg_accum_times)

◆ hal_set_cal_cfg9_cfg_rx_iq_comp_bypass()

osal_void hal_set_cal_cfg9_cfg_rx_iq_comp_bypass ( osal_u32  cfg_rx_iq_comp_bypass)

◆ hal_set_cal_cfg9_cfg_rx_iq_comp_sel_man()

osal_void hal_set_cal_cfg9_cfg_rx_iq_comp_sel_man ( osal_u32  cfg_rx_iq_comp_sel_man)

◆ hal_set_cal_fft_sa_ctrl1_cfg_cali_iq_fft_size()

osal_void hal_set_cal_fft_sa_ctrl1_cfg_cali_iq_fft_size ( osal_u32  cfg_cali_iq_fft_size)

◆ hal_set_cal_fft_sa_ctrl2_cfg_dfe_loop_choose()

osal_void hal_set_cal_fft_sa_ctrl2_cfg_dfe_loop_choose ( osal_u32  cfg_dfe_loop_choose)

◆ hal_set_cal_rx_dc_comp_bypass_cfg_rx_dc_comp_bypass()

osal_void hal_set_cal_rx_dc_comp_bypass_cfg_rx_dc_comp_bypass ( osal_u32  cfg_rx_dc_comp_bypass)

◆ hal_set_cal_rx_dc_comp_value_cfg_rx0_dc_comp_i()

osal_void hal_set_cal_rx_dc_comp_value_cfg_rx0_dc_comp_i ( osal_u32  cfg_rx0_dc_comp_i)

◆ hal_set_cal_rx_dc_comp_value_cfg_rx0_dc_comp_q()

osal_void hal_set_cal_rx_dc_comp_value_cfg_rx0_dc_comp_q ( osal_u32  cfg_rx0_dc_comp_q)

◆ hal_set_cal_tone_gen1_cfg_tone_amp()

osal_void hal_set_cal_tone_gen1_cfg_tone_amp ( osal_u32  cfg_tone_amp)

◆ hal_set_cal_tone_gen1_cfg_tone_en()

osal_void hal_set_cal_tone_gen1_cfg_tone_en ( osal_u32  cfg_tone_en)

◆ hal_set_cal_tone_gen1_cfg_tone_mask()

osal_void hal_set_cal_tone_gen1_cfg_tone_mask ( osal_u32  cfg_tone_mask)

◆ hal_set_cal_tone_gen1_cfg_tone_mode_user()

osal_void hal_set_cal_tone_gen1_cfg_tone_mode_user ( osal_u32  cfg_tone_mode_user)

◆ hal_set_cal_tone_gen1_cfg_tone_sign()

osal_void hal_set_cal_tone_gen1_cfg_tone_sign ( osal_u32  cfg_tone_sign)

◆ hal_set_cal_tone_gen1_iq_cali_delay()

osal_void hal_set_cal_tone_gen1_iq_cali_delay ( osal_u32  iq_cali_delay)

◆ hal_set_cal_tone_gen_ctrl1_cfg_trx_iq_mode()

osal_void hal_set_cal_tone_gen_ctrl1_cfg_trx_iq_mode ( osal_u32  cfg_trx_iq_mode)

◆ hal_set_cal_tone_gen_ctrl2_cfg_rx_tone_pn_intvl()

osal_void hal_set_cal_tone_gen_ctrl2_cfg_rx_tone_pn_intvl ( osal_u32  cfg_rx_tone_pn_intvl)

◆ hal_set_cal_tone_gen_ctrl2_cfg_tx_tone_pn_intvl()

osal_void hal_set_cal_tone_gen_ctrl2_cfg_tx_tone_pn_intvl ( osal_u32  cfg_tx_tone_pn_intvl)

◆ hal_set_cal_trx_iq_ctrl1_cfg_iq_sym_num()

osal_void hal_set_cal_trx_iq_ctrl1_cfg_iq_sym_num ( osal_u32  cfg_iq_sym_num)

◆ hal_set_cal_trx_iq_ctrl1_cfg_trx_iq_cali_en()

osal_void hal_set_cal_trx_iq_ctrl1_cfg_trx_iq_cali_en ( osal_u32  cfg_trx_iq_cali_en)

◆ hal_set_cal_trxiq_fft_index_0_index0()

osal_void hal_set_cal_trxiq_fft_index_0_index0 ( osal_u32  index0)

◆ hal_set_cal_trxiq_fft_index_1_index1()

osal_void hal_set_cal_trxiq_fft_index_1_index1 ( osal_u32  index1)

◆ hal_set_cal_trxiq_fft_index_2_index2()

osal_void hal_set_cal_trxiq_fft_index_2_index2 ( osal_u32  index2)

◆ hal_set_cal_trxiq_fft_index_3_index3()

osal_void hal_set_cal_trxiq_fft_index_3_index3 ( osal_u32  index3)

◆ hal_set_cal_tx_dc_comp_bypass_cfg_tx_dc_comp_bypass()

osal_void hal_set_cal_tx_dc_comp_bypass_cfg_tx_dc_comp_bypass ( osal_u32  cfg_tx_dc_comp_bypass)

◆ hal_set_cal_tx_dc_en_cfg_tx_dc_en()

osal_void hal_set_cal_tx_dc_en_cfg_tx_dc_en ( osal_u32  cfg_tx_dc_en)

◆ hal_set_cal_tx_ivalue_cfg_tx_dc_ivalue()

osal_void hal_set_cal_tx_ivalue_cfg_tx_dc_ivalue ( osal_u32  cfg_tx_dc_ivalue)

◆ hal_set_cal_tx_pwr_comp_bypass_cfg_tx_pwr_comp_bypass()

osal_void hal_set_cal_tx_pwr_comp_bypass_cfg_tx_pwr_comp_bypass ( osal_u32  cfg_tx_pwr_comp_bypass)

◆ hal_set_cal_tx_qvalue_cfg_tx_dc_qvalue()

osal_void hal_set_cal_tx_qvalue_cfg_tx_dc_qvalue ( osal_u32  cfg_tx_dc_qvalue)

◆ hal_set_cal_txiq_comp_ctrl_cfg_tx_iq_comp_bypass()

osal_void hal_set_cal_txiq_comp_ctrl_cfg_tx_iq_comp_bypass ( osal_u32  cfg_tx_iq_comp_bypass)

◆ hal_set_cal_txiq_comp_ctrl_cfg_tx_iq_comp_sel_man()

osal_void hal_set_cal_txiq_comp_ctrl_cfg_tx_iq_comp_sel_man ( osal_u32  cfg_tx_iq_comp_sel_man)

◆ hal_set_cali_new_add_reg_cfg_fb_pwr_calc_prd()

osal_void hal_set_cali_new_add_reg_cfg_fb_pwr_calc_prd ( osal_u32  cfg_fb_pwr_calc_prd)

◆ hal_set_cont_tx_mode_0_cfg_tx_vector_0word()

osal_void hal_set_cont_tx_mode_0_cfg_tx_vector_0word ( osal_u32  cfg_tx_vector_0word)

◆ hal_set_cont_tx_mode_1_cfg_tx_vector_1word()

osal_void hal_set_cont_tx_mode_1_cfg_tx_vector_1word ( osal_u32  cfg_tx_vector_1word)

◆ hal_set_cont_tx_mode_2_cfg_tx_vector_2word()

osal_void hal_set_cont_tx_mode_2_cfg_tx_vector_2word ( osal_u32  cfg_tx_vector_2word)

◆ hal_set_cont_tx_mode_3_cfg_tx_vector_3word()

osal_void hal_set_cont_tx_mode_3_cfg_tx_vector_3word ( osal_u32  cfg_tx_vector_3word)

◆ hal_set_cont_tx_mode_4_cfg_tx_vector_4word()

osal_void hal_set_cont_tx_mode_4_cfg_tx_vector_4word ( osal_u32  cfg_tx_vector_4word)

◆ hal_set_cont_tx_mode_5_cfg_tx_vector_5word()

osal_void hal_set_cont_tx_mode_5_cfg_tx_vector_5word ( osal_u32  cfg_tx_vector_5word)

◆ hal_set_cont_tx_mode_6_cfg_tx_vector_6word()

osal_void hal_set_cont_tx_mode_6_cfg_tx_vector_6word ( osal_u32  cfg_tx_vector_6word)

◆ hal_set_dac_fs_cfg_dac_fs()

osal_void hal_set_dac_fs_cfg_dac_fs ( osal_u32  cfg_dac_fs)

◆ hal_set_div_num_sel_wp0_tx_dfe_1dom_div_num_sel()

osal_void hal_set_div_num_sel_wp0_tx_dfe_1dom_div_num_sel ( osal_u32  wp0_tx_dfe_1dom_div_num_sel)

◆ hal_set_dyn_tx_power_cali_dyn_tx_power_cali()

osal_void hal_set_dyn_tx_power_cali_dyn_tx_power_cali ( osal_u32  dyn_tx_power_cali)

◆ hal_set_fifo_alarm_tx_fifo_almost_full_alm_neg_0ch()

osal_void hal_set_fifo_alarm_tx_fifo_almost_full_alm_neg_0ch ( osal_u32  tx_fifo_almost_full_alm_neg_0ch)

◆ hal_set_fifoctrl_reg_rx_fifo_en()

osal_void hal_set_fifoctrl_reg_rx_fifo_en ( osal_u32  reg_rx_fifo_en)

◆ hal_set_fifoctrl_reg_tx_fifo_en()

osal_void hal_set_fifoctrl_reg_tx_fifo_en ( osal_u32  reg_tx_fifo_en)

◆ hal_set_online_cfg0_online_dc_tracking_enable()

osal_void hal_set_online_cfg0_online_dc_tracking_enable ( osal_u32  online_dc_tracking_enable)

◆ hal_set_rx_iq_neg_beta_comp_cfg_rx_iq_mismatch_neg_beta_imag()

osal_void hal_set_rx_iq_neg_beta_comp_cfg_rx_iq_mismatch_neg_beta_imag ( osal_u32  cfg_rx_iq_mismatch_neg_beta_imag)

◆ hal_set_rx_iq_neg_beta_comp_cfg_rx_iq_mismatch_neg_beta_real()

osal_void hal_set_rx_iq_neg_beta_comp_cfg_rx_iq_mismatch_neg_beta_real ( osal_u32  cfg_rx_iq_mismatch_neg_beta_real)

◆ hal_set_rx_iq_pos_beta_comp_cfg_rx_iq_mismatch_pos_beta_imag()

osal_void hal_set_rx_iq_pos_beta_comp_cfg_rx_iq_mismatch_pos_beta_imag ( osal_u32  cfg_rx_iq_mismatch_pos_beta_imag)

◆ hal_set_rx_iq_pos_beta_comp_cfg_rx_iq_mismatch_pos_beta_real()

osal_void hal_set_rx_iq_pos_beta_comp_cfg_rx_iq_mismatch_pos_beta_real ( osal_u32  cfg_rx_iq_mismatch_pos_beta_real)

◆ hal_set_test_start_sample_done()

osal_void hal_set_test_start_sample_done ( osal_u32  sample_done)

◆ hal_set_test_start_test_start()

osal_void hal_set_test_start_test_start ( osal_u32  test_start)

◆ hal_set_tx_control_cfg_cont_tx_frm()

osal_void hal_set_tx_control_cfg_cont_tx_frm ( osal_u32  cfg_cont_tx_frm)

◆ hal_set_tx_control_cfg_cont_tx_pattern()

osal_void hal_set_tx_control_cfg_cont_tx_pattern ( osal_u32  cfg_cont_tx_pattern)

◆ hal_set_tx_control_cfg_en_cont_tx()

osal_void hal_set_tx_control_cfg_en_cont_tx ( osal_u32  cfg_en_cont_tx)

◆ hal_set_tx_dfe_0dly_cfg_tx_dly_11b_time()

osal_void hal_set_tx_dfe_0dly_cfg_tx_dly_11b_time ( osal_u32  cfg_tx_dly_11b_time)

◆ hal_set_tx_dfe_0dly_cfg_tx_dly_20m_time()

osal_void hal_set_tx_dfe_0dly_cfg_tx_dly_20m_time ( osal_u32  cfg_tx_dly_20m_time)

◆ hal_set_tx_dfe_0dly_cfg_tx_dly_40m_time()

osal_void hal_set_tx_dfe_0dly_cfg_tx_dly_40m_time ( osal_u32  cfg_tx_dly_40m_time)

◆ hal_set_tx_iq_neg_beta_comp_cfg_tx_iq_mismatch_neg_beta_imag()

osal_void hal_set_tx_iq_neg_beta_comp_cfg_tx_iq_mismatch_neg_beta_imag ( osal_u32  cfg_tx_iq_mismatch_neg_beta_imag)

◆ hal_set_tx_iq_neg_beta_comp_cfg_tx_iq_mismatch_neg_beta_real()

osal_void hal_set_tx_iq_neg_beta_comp_cfg_tx_iq_mismatch_neg_beta_real ( osal_u32  cfg_tx_iq_mismatch_neg_beta_real)

◆ hal_set_tx_iq_pos_beta_comp_cfg_tx_iq_mismatch_pos_beta_imag()

osal_void hal_set_tx_iq_pos_beta_comp_cfg_tx_iq_mismatch_pos_beta_imag ( osal_u32  cfg_tx_iq_mismatch_pos_beta_imag)

◆ hal_set_tx_iq_pos_beta_comp_cfg_tx_iq_mismatch_pos_beta_real()

osal_void hal_set_tx_iq_pos_beta_comp_cfg_tx_iq_mismatch_pos_beta_real ( osal_u32  cfg_tx_iq_mismatch_pos_beta_real)

◆ hal_set_tx_new_add3_cfg_cont_fcs()

osal_void hal_set_tx_new_add3_cfg_cont_fcs ( osal_u32  cfg_cont_fcs)

◆ hal_set_tx_power_accum_delay_power_accum_delay()

osal_void hal_set_tx_power_accum_delay_power_accum_delay ( osal_u32  power_accum_delay)

◆ hal_set_tx_time_1dly_cfg_tx_dly_20m_time_he()

osal_void hal_set_tx_time_1dly_cfg_tx_dly_20m_time_he ( osal_u32  cfg_tx_dly_20m_time_he)

◆ hal_set_tx_time_1dly_cfg_tx_dly_40m_time_he()

osal_void hal_set_tx_time_1dly_cfg_tx_dly_40m_time_he ( osal_u32  cfg_tx_dly_40m_time_he)

◆ hal_set_wcbb_clk_div_2_wp0_cali_rxdfe_agc_div_num()

osal_void hal_set_wcbb_clk_div_2_wp0_cali_rxdfe_agc_div_num ( osal_u32  wp0_cali_rxdfe_agc_div_num)

◆ hal_set_wcbb_clk_div_5_wp0_tx_div_num_man()

osal_void hal_set_wcbb_clk_div_5_wp0_tx_div_num_man ( osal_u32  wp0_tx_div_num_man)

◆ hal_set_wcbb_clk_sel_wp0_fft_clksel_mod()

osal_void hal_set_wcbb_clk_sel_wp0_fft_clksel_mod ( osal_u32  wp0_fft_clksel_mod)

◆ hal_set_wcbb_soft_clken_sel0()

osal_void hal_set_wcbb_soft_clken_sel0 ( osal_u32  value)

◆ hal_set_wcbb_soft_reset_reg()

osal_void hal_set_wcbb_soft_reset_reg ( osal_u32  soft_rst_wp0_phy_reg_n)

◆ hal_set_wlbb_testmode_wlbb_testmode()

osal_void hal_set_wlbb_testmode_wlbb_testmode ( osal_u32  wlbb_testmode)