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hal_watchdog_v151_regs_op.h
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1
9#ifndef HAL_WATCHDOG_V151_REGS_OP_H
10#define HAL_WATCHDOG_V151_REGS_OP_H
11
12#include <stdint.h>
14
15#ifdef __cplusplus
16#if __cplusplus
17extern "C" {
18#endif /* __cplusplus */
19#endif /* __cplusplus */
20
28
33static inline void hal_watchdog_wdt_lock_set(uint32_t val)
34{
35 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_lock = val;
36}
37
42static inline uint32_t hal_watchdog_wdt_lock_get(void)
43{
44 return ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_lock;
45}
46
51static inline uint32_t hal_watchdog_wdt_load_get_wdt_load(void)
52{
53 wdt_v151_load_data_t wdt_load;
54 wdt_load.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_load;
55 return wdt_load.b.wdt_load;
56}
57
62static inline void hal_watchdog_wdt_load_set_wdt_load(uint32_t val)
63{
64 wdt_v151_load_data_t wdt_load;
65 wdt_load.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_load;
66 wdt_load.b.wdt_load = val;
67 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_load = wdt_load.d32;
68}
69
74static inline uint32_t hal_watchdog_wdt_load_get_wdt_reserved(void)
75{
76 wdt_v151_load_data_t wdt_load;
77 wdt_load.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_load;
78 return wdt_load.b.reserved0_7;
79}
80
85static inline void hal_watchdog_wdt_restart_set(uint32_t val)
86{
87 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_restart = val;
88}
89
94static inline uint32_t hal_watchdog_wdt_restart_get(void)
95{
96 return ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_restart;
97}
98
103static inline void hal_watchdog_wdt_eoi_set_wdt_eoi(uint32_t val)
104{
105 wdt_v151_eoi_data_t wdt_eoi;
106 wdt_eoi.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_eoi;
107 wdt_eoi.b.wdt_eoi = val;
108 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_eoi = wdt_eoi.d32;
109}
110
115static inline uint32_t hal_watchdog_v151_wdt_cr_get_wdt_en(void)
116{
117 wdt_v151_cr_data_t wdt_cr;
118 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
119 return wdt_cr.b.wdt_en;
120}
121
126static inline void hal_watchdog_v151_wdt_cr_set_wdt_en(uint32_t val)
127{
128 wdt_v151_cr_data_t wdt_cr;
129 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
130 wdt_cr.b.wdt_en = val;
131 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr = wdt_cr.d32;
132}
133
138static inline uint32_t hal_watchdog_wdt_cr_get_rst_en(void)
139{
140 wdt_v151_cr_data_t wdt_cr;
141 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
142 return wdt_cr.b.rst_en;
143}
144
149static inline void hal_watchdog_wdt_cr_set_rst_en(uint32_t val)
150{
151 wdt_v151_cr_data_t wdt_cr;
152 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
153 wdt_cr.b.rst_en = val;
154 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr = wdt_cr.d32;
155}
156
161static inline uint32_t hal_watchdog_wdt_cr_get_rst_pl(void)
162{
163 wdt_v151_cr_data_t wdt_cr;
164 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
165 return wdt_cr.b.rst_pl;
166}
167
172static inline void hal_watchdog_wdt_cr_set_rst_pl(uint32_t val)
173{
174 wdt_v151_cr_data_t wdt_cr;
175 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
176 wdt_cr.b.rst_pl = val;
177 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr = wdt_cr.d32;
178}
179
184static inline uint32_t hal_watchdog_wdt_cr_get_wdt_imsk(void)
185{
186 wdt_v151_cr_data_t wdt_cr;
187 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
188 return wdt_cr.b.wdt_imsk;
189}
190
195static inline void hal_watchdog_wdt_cr_set_wdt_imsk(uint32_t val)
196{
197 wdt_v151_cr_data_t wdt_cr;
198 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
199 wdt_cr.b.wdt_imsk = val;
200 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr = wdt_cr.d32;
201}
202
207static inline uint32_t hal_watchdog_wdt_cr_get_wdt_mode(void)
208{
209 wdt_v151_cr_data_t wdt_cr;
210 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
211 return wdt_cr.b.wdt_mode;
212}
213
218static inline void hal_watchdog_wdt_cr_set_wdt_mode(uint32_t val)
219{
220 wdt_v151_cr_data_t wdt_cr;
221 wdt_cr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr;
222 wdt_cr.b.wdt_mode = val;
223 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cr = wdt_cr.d32;
224}
225
230static inline uint32_t hal_watchdog_wdt_cnt_get(void)
231{
232 return ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_cnt;
233}
234
239static inline uint32_t hal_watchdog_wdt_raw_intr_get_wdt_raw_intr(void)
240{
241 wdt_v151_raw_intr_data_t wdt_raw_intr;
242 wdt_raw_intr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_raw_intr;
243 return wdt_raw_intr.b.wdt_raw_intr;
244}
245
250static inline uint32_t hal_watchdog_wdt_intr_get_wdt_intr(void)
251{
252 wdt_v151_intr_data_t wdt_intr;
253 wdt_intr.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_intr;
254 return wdt_intr.b.wdt_intr;
255}
256
261static inline uint32_t hal_watchdog_wdt_lpif_state_get_wdt_lpif_state(void)
262{
263 wdt_v151_lpif_state_data_t wdt_lpif_state;
264 wdt_lpif_state.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_lpif_state;
265 return wdt_lpif_state.b.wdt_lpif_state;
266}
267
272static inline void hal_watchdog_wdt_lpif_state_set_wdt_lpif_state(uint32_t val)
273{
274 wdt_v151_lpif_state_data_t wdt_lpif_state;
275 wdt_lpif_state.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_lpif_state;
276 wdt_lpif_state.b.wdt_lpif_state = val;
277 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_lpif_state = wdt_lpif_state.d32;
278}
279
284static inline uint32_t hal_watchdog_wdt_status_get_wdt_status(void)
285{
286 wdt_v151_status_data_t wdt_status;
287 wdt_status.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_status;
288 return wdt_status.b.wdt_status;
289}
290
295static inline void hal_watchdog_wdt_status_set_wdt_status(uint32_t val)
296{
297 wdt_v151_status_data_t wdt_status;
298 wdt_status.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_status;
299 wdt_status.b.wdt_status = val;
300 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_status = wdt_status.d32;
301}
302
307static inline void hal_watchdog_wdt_ccvr_en_set_wdt_ccvr_req(uint32_t val)
308{
309 wdt_v151_ccvr_en_data_t wdt_ccvr_en;
310 wdt_ccvr_en.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_ccvr_en;
311 wdt_ccvr_en.b.wdt_ccvr_req = val;
312 ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_ccvr_en = wdt_ccvr_en.d32;
313}
314
319static inline uint32_t hal_watchdog_wdt_ccvr_en_get_wdt_ccvr_req(void)
320{
321 wdt_v151_ccvr_en_data_t wdt_ccvr_en;
322 wdt_ccvr_en.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_ccvr_en;
323 return wdt_ccvr_en.b.wdt_ccvr_req;
324}
325
330static inline uint32_t hal_watchdog_wdt_ccvr_en_get_wdt_ccvr_lock(void)
331{
332 wdt_v151_ccvr_en_data_t wdt_ccvr_en;
333 wdt_ccvr_en.d32 = ((watchdog_v151_regs_t *)g_watchdog_regs)->wdt_ccvr_en;
334 return wdt_ccvr_en.b.wdt_ccvr_lock;
335}
336
337
342#ifdef __cplusplus
343#if __cplusplus
344}
345#endif /* __cplusplus */
346#endif /* __cplusplus */
347
348#endif
uintptr_t g_watchdog_regs
Definition hal_watchdog.c:13
Registers associated with Watchdog.
Definition hal_watchdog_v151_regs_def.h:228
unsigned int uintptr_t
Definition td_type.h:65
This union represents the bit field in the wdt Current Counter Value Request Register....
Definition hal_watchdog_v151_regs_def.h:210
uint32_t d32
Definition hal_watchdog_v151_regs_def.h:211
uint32_t wdt_ccvr_lock
Definition hal_watchdog_v151_regs_def.h:216
uint32_t wdt_ccvr_req
Definition hal_watchdog_v151_regs_def.h:213
struct wdt_v151_ccvr_en_data::@57 b
This union represents the bit fields in the Control Register. Read the register into the d32 member t...
Definition hal_watchdog_v151_regs_def.h:98
uint32_t rst_pl
Definition hal_watchdog_v151_regs_def.h:107
uint32_t wdt_imsk
Definition hal_watchdog_v151_regs_def.h:116
uint32_t wdt_en
Definition hal_watchdog_v151_regs_def.h:101
uint32_t rst_en
Definition hal_watchdog_v151_regs_def.h:104
uint32_t d32
Definition hal_watchdog_v151_regs_def.h:99
struct wdt_v151_cr_data::@51 b
uint32_t wdt_mode
Definition hal_watchdog_v151_regs_def.h:119
This union represents the bit field in the Interrupt clear Register. Read the register into the d32 m...
Definition hal_watchdog_v151_regs_def.h:84
uint32_t d32
Definition hal_watchdog_v151_regs_def.h:85
uint32_t wdt_eoi
Definition hal_watchdog_v151_regs_def.h:87
struct wdt_v151_eoi_data::@50 b
This union represents the bit field in the Interrupt Register. Read the register into the d32 member ...
Definition hal_watchdog_v151_regs_def.h:159
struct wdt_v151_intr_data::@54 b
uint32_t wdt_intr
Definition hal_watchdog_v151_regs_def.h:162
uint32_t d32
Definition hal_watchdog_v151_regs_def.h:160
This union represents the bit field in the Load Register. Read the register into the d32 member then ...
Definition hal_watchdog_v151_regs_def.h:56
struct wdt_v151_load_data::@48 b
uint32_t reserved0_7
Definition hal_watchdog_v151_regs_def.h:59
uint32_t d32
Definition hal_watchdog_v151_regs_def.h:57
uint32_t wdt_load
Definition hal_watchdog_v151_regs_def.h:61
This union represents the bit field in the Low power state Register. Read the register into the d32 m...
Definition hal_watchdog_v151_regs_def.h:174
uint32_t wdt_lpif_state
Definition hal_watchdog_v151_regs_def.h:177
uint32_t d32
Definition hal_watchdog_v151_regs_def.h:175
struct wdt_v151_lpif_state_data::@55 b
This union represents the bit field in the Raw interrupt Register. Read the register into the d32 mem...
Definition hal_watchdog_v151_regs_def.h:144
struct wdt_v151_raw_intr_data::@53 b
uint32_t wdt_raw_intr
Definition hal_watchdog_v151_regs_def.h:147
uint32_t d32
Definition hal_watchdog_v151_regs_def.h:145
This union represents the bit field in the Status Register. Read the register into the d32 member the...
Definition hal_watchdog_v151_regs_def.h:195
struct wdt_v151_status_data::@56 b
uint32_t d32
Definition hal_watchdog_v151_regs_def.h:196
uint32_t wdt_status
Definition hal_watchdog_v151_regs_def.h:198