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spi_v151_interrupt_data联合体 参考

This union represents the bit fields in the Interrupt Registers.
Read the register into the d32 member then set/clear the bits using the b elements. 更多...

#include <hal_spi_v151_regs_def.h>

成员变量

uint32_t d32
 
struct { 
 
   uint32_t   rffis: 1 
 
   uint32_t   rfofis: 1 
 
   uint32_t   rfufis: 1 
 
   uint32_t   reserved3_6: 4 
 
   uint32_t   tfeis: 1 
 
   uint32_t   tfofis: 1 
 
   uint32_t   reserved9_14: 6 
 
   uint32_t   mmcris: 1 
 
b 
 

详细描述

This union represents the bit fields in the Interrupt Registers.
Read the register into the d32 member then set/clear the bits using the b elements.

结构体成员变量说明

◆ [struct]

struct { ... } spi_v151_interrupt_data::b

Register bits.

◆ d32

uint32_t spi_v151_interrupt_data::d32

Raw register data.

◆ mmcris

uint32_t spi_v151_interrupt_data::mmcris

Multi-Master Contention Interrupt Mask. This bit field is not present if the spi is configured as a spi_slenrial-slave device.
Values:

  • 0x0 (SET): ssi_mst_intr interrupt is set
  • 0x1 (UNSET): ssi_mst_intr interrupt is not set

◆ reserved3_6

uint32_t spi_v151_interrupt_data::reserved3_6

◆ reserved9_14

uint32_t spi_v151_interrupt_data::reserved9_14

◆ rffis

uint32_t spi_v151_interrupt_data::rffis

Receive FIFO Full Interrupt Mask.
Values:

  • 0x0 (SET): ssi_rxf_intr interrupt is set
  • 0x1 (UNSET): ssi_rxf_intr interrupt is not set

◆ rfofis

uint32_t spi_v151_interrupt_data::rfofis

Receive FIFO Overflow Interrupt Mask.
Values:

  • 0x0 (SET): ssi_rxo_intr interrupt is set
  • 0x1 (UNSET): ssi_rxo_intr interrupt is not set

◆ rfufis

uint32_t spi_v151_interrupt_data::rfufis

Receive FIFO Underflow Interrupt Mask.
Values:

  • 0x0 (SET): ssi_rxu_intr interrupt is set
  • 0x1 (UNSET): ssi_rxu_intr interrupt is not set

◆ tfeis

uint32_t spi_v151_interrupt_data::tfeis

Transmit FIFO Empty Interrupt Mask.
Values:

  • 0x0 (SET): ssi_txe_intr interrupt is set
  • 0x1 (UNSET): ssi_txe_intr interrupt is not set

◆ tfofis

uint32_t spi_v151_interrupt_data::tfofis

Transmit FIFO Overflow Interrupt Mask.
Values:

  • 0x0 (SET): ssi_txo_intr interrupt is set
  • 0x1 (UNSET): ssi_txo_intr interrupt is not set

该联合体的文档由以下文件生成: