adc_porting.h

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#ifndef ADC_PORTING_H
#define ADC_PORTING_H
 
#include <stdint.h>
#include <stdbool.h>
#include "adc.h"
#include "osal_interrupt.h"
 
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
 
#define ADC_LOCK_GET_ATTE 0xFFFFFFFF
 
/* auto scan fifo start addr */
#define HAL_ADC_SCAN_CH0_1_ADDR       0x4400D01C
#define HAL_ADC_SCAN_CH2_3_ADDR       0x4400D024
#define HAL_ADC_SCAN_CH0_ADDR         0x4400D01C
#define HAL_ADC_SCAN_CH1_ADDR         0x4400D020
#define HAL_ADC_SCAN_CH2_ADDR         0x4400D024
#define HAL_ADC_SCAN_CH3_ADDR         0x4400D028
#define HAL_ADC_SCAN_CH4_ADDR         0x4400D02C
#define HAL_ADC_SCAN_CH5_ADDR         0x4400D030
 
// FPGA手册中只有CH1 CH6 CH7，platfor_core.h中无对应的GPIO，此处先统一写0
#define HAL_ADC_CH0_PIN  0
#define HAL_ADC_CH1_PIN  0
#define HAL_ADC_CH2_PIN  0
#define HAL_ADC_CH3_PIN  0
#define HAL_ADC_CH4_PIN  0
#define HAL_ADC_CH5_PIN  0
#define HAL_ADC_CH6_PIN  0
#define HAL_ADC_CH7_PIN  0
#define HAL_ADC_CH8_PIN  0
 
typedef enum {
    ADC_CHANNEL_0,
    ADC_CHANNEL_1,
    ADC_CHANNEL_2,
    ADC_CHANNEL_3,
    ADC_CHANNEL_4,
    ADC_CHANNEL_5,
    ADC_CHANNEL_MAX_NUM,
    ADC_CHANNEL_NONE = ADC_CHANNEL_MAX_NUM
} adc_channel_t;
 
typedef enum {
    HAL_ADC_SCAN_FREQ_2HZ,
    HAL_ADC_SCAN_FREQ_4HZ,
    HAL_ADC_SCAN_FREQ_8HZ,
    HAL_ADC_SCAN_FREQ_16HZ,
    HAL_ADC_SCAN_FREQ_32HZ,
    HAL_ADC_SCAN_FREQ_64HZ,
    HAL_ADC_SCAN_FREQ_128HZ,
    HAL_ADC_SCAN_FREQ_256HZ,
    HAL_ADC_SCAN_FREQ_MAX,
    HAL_ADC_SCAN_FREQ_NONE = HAL_ADC_SCAN_FREQ_MAX
} port_adc_scan_freq_t;
 
uintptr_t adc_porting_base_addr_get(void);
 
uintptr_t cldo_addr_get(void);
 
void adc_port_register_hal_funcs(void);
 
void adc_port_unregister_hal_funcs(void);
 
void adc_port_init_clock(adc_clock_t clock);
 
void adc_port_clock_enable(bool on);
 
void adc_port_register_irq(void);
 
void adc_port_unregister_irq(void);
 
void adc_port_power_on(bool on);
 
void adc_port_calibration(void);
 
void adc_port_pull_disable(adc_channel_t channel);
 
void adc_port_set_scan_discard_and_average_num(adc_channel_t channel);
 
inline uint32_t adc_irq_lock(void)
{
    return osal_irq_lock();
}
 
inline void adc_irq_unlock(uint32_t irq_sts)
{
    osal_irq_restore(irq_sts);
}
 
errcode_t adc_port_get_cali_param(uint8_t *data_s, uint8_t *data_b, uint8_t *data_k);
errcode_t adc_port_read(uint8_t channel, uint16_t *data);
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
 
#endif