pwm_cfg_int_clr0_data联合体 参考

This union represents the bit fields in the pwm_cfg_int_clr0 register. Read the register into the d32 member then set/clear the bits using the b elements. 更多...

#include <hal_pwm_v151_regs_def.h>

成员变量
uint32_t	d32
struct {
uint32_t   pwm_cfg_int_clr0: 16
uint32_t   reserved16_31: 16
}	b

详细描述

This union represents the bit fields in the pwm_cfg_int_clr0 register. Read the register into the d32 member then set/clear the bits using the b elements.

结构体成员变量说明

[struct]

struct { ... } pwm_cfg_int_clr0_data::b

d32

uint32_t pwm_cfg_int_clr0_data::d32

Raw register data.

pwm_cfg_int_clr0

uint32_t pwm_cfg_int_clr0_data::pwm_cfg_int_clr0

Pwm step mode end-of-cycle interrupt clear register. Corresponds to the pwm_cfg_int interrupt and pwm_periodload_flag_j registers.

reserved16_31

uint32_t pwm_cfg_int_clr0_data::reserved16_31

Reserved.

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该联合体的文档由以下文件生成:

• src/drivers/drivers/hal/pwm/v151/hal_pwm_v151_regs_def.h