#include "chip_io.h"
#include "arch_barrier.h"
#include "flash_patch.h"

flash_patch.c 的引用(Include)关系图:

宏定义
#define	RISCV31_PATCH_FLPCTRL 0xE0000000

#define	RISCV31_PATCH_FLPCTRL_OFFSET 0x0

#define	RISCV31_PATCH_FLPRMP (RISCV31_PATCH_FLPCTRL + 0x4)

#define	RISCV31_PATCH_FLPLACMP0 (RISCV31_PATCH_FLPCTRL + 0x8)

#define	RISCV31_PATCH_FLPLACMP1 (RISCV31_PATCH_FLPCTRL + 0xC)

#define	RISCV31_PATCH_FLPIACMP0 (RISCV31_PATCH_FLPCTRL + 0x10)

#define	RISCV31_PATCH_FLPCTRL_ENABLE 0x1

#define	RISCV31_PATCH_FLPCTRL_PCO_WITHIN_1M 0x0

#define	RISCV31_PATCH_FLPCTRL_PCO_LARGER_1M 0x1

#define	RISCV31_PATCH_FLPCTRL_WPT_WRITABLE 0x0

#define	RISCV31_PATCH_FLPCTRL_WPT_UNWRITABLE 0x1

#define	RISCV31_PATCH_FLPCTRL_FLPLACMP0_DISABLE 0x0

#define	RISCV31_PATCH_FLPCTRL_FLPLACMP1_DISABLE 0x0

#define	RISCV31_PATCH_FP_CMP_CTRL_INDEX 0

#define	RISCV31_PATCH_FP_CMP_REMAP_INDEX 1

#define	RISCV31_PATCH_FP_CMP_COUNT_INDEX 2

#define	RISCV31_PATCH_FP_CMP_MATCH_INDEX 3

枚举
enum	sema_enum { GEN_BIT0 = 0 , WPT_BIT1 = 1 , PCO_BIT2 = 2 , LACEN0_BIT3 = 3 , LACEN1_BIT4 = 4 }

函数
void	riscv_patch_init (riscv_cfg_t patch_cfg)
	Initialises the patch.

宏定义说明

◆ RISCV31_PATCH_FLPCTRL

#define RISCV31_PATCH_FLPCTRL 0xE0000000

◆ RISCV31_PATCH_FLPCTRL_ENABLE

#define RISCV31_PATCH_FLPCTRL_ENABLE 0x1

◆ RISCV31_PATCH_FLPCTRL_FLPLACMP0_DISABLE

#define RISCV31_PATCH_FLPCTRL_FLPLACMP0_DISABLE 0x0

◆ RISCV31_PATCH_FLPCTRL_FLPLACMP1_DISABLE

#define RISCV31_PATCH_FLPCTRL_FLPLACMP1_DISABLE 0x0

◆ RISCV31_PATCH_FLPCTRL_OFFSET

#define RISCV31_PATCH_FLPCTRL_OFFSET 0x0

◆ RISCV31_PATCH_FLPCTRL_PCO_LARGER_1M

#define RISCV31_PATCH_FLPCTRL_PCO_LARGER_1M 0x1

◆ RISCV31_PATCH_FLPCTRL_PCO_WITHIN_1M

#define RISCV31_PATCH_FLPCTRL_PCO_WITHIN_1M 0x0

◆ RISCV31_PATCH_FLPCTRL_WPT_UNWRITABLE

#define RISCV31_PATCH_FLPCTRL_WPT_UNWRITABLE 0x1

◆ RISCV31_PATCH_FLPCTRL_WPT_WRITABLE

#define RISCV31_PATCH_FLPCTRL_WPT_WRITABLE 0x0

◆ RISCV31_PATCH_FLPIACMP0

#define RISCV31_PATCH_FLPIACMP0 (RISCV31_PATCH_FLPCTRL + 0x10)

◆ RISCV31_PATCH_FLPLACMP0

#define RISCV31_PATCH_FLPLACMP0 (RISCV31_PATCH_FLPCTRL + 0x8)

◆ RISCV31_PATCH_FLPLACMP1

#define RISCV31_PATCH_FLPLACMP1 (RISCV31_PATCH_FLPCTRL + 0xC)

◆ RISCV31_PATCH_FLPRMP

#define RISCV31_PATCH_FLPRMP (RISCV31_PATCH_FLPCTRL + 0x4)

◆ RISCV31_PATCH_FP_CMP_COUNT_INDEX

#define RISCV31_PATCH_FP_CMP_COUNT_INDEX 2

◆ RISCV31_PATCH_FP_CMP_CTRL_INDEX

#define RISCV31_PATCH_FP_CMP_CTRL_INDEX 0

◆ RISCV31_PATCH_FP_CMP_MATCH_INDEX

#define RISCV31_PATCH_FP_CMP_MATCH_INDEX 3

◆ RISCV31_PATCH_FP_CMP_REMAP_INDEX

#define RISCV31_PATCH_FP_CMP_REMAP_INDEX 1

枚举类型说明

◆ sema_enum

enum sema_enum

枚举值
GEN_BIT0
WPT_BIT1
PCO_BIT2
LACEN0_BIT3
LACEN1_BIT4

函数说明

◆ riscv_patch_init()

void riscv_patch_init ( riscv_cfg_t patch_cfg )

Initialises the patch.

参数

patch_cfg RISC-V patch configuration.