hal_spi.h

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#ifndef HAL_SPI_H
#define HAL_SPI_H
 
#include <stdint.h>
#include <stdbool.h>
#include "errcode.h"
#include "common_def.h"
#include "spi_porting.h"
 
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
 
typedef enum hal_spi_ctrl_id {
    SPI_CTRL_SET_ATTR,                  
    SPI_CTRL_GET_ATTR,                  
    SPI_CTRL_SET_EXTRA_ATTR,            
    SPI_CTRL_GET_EXTRA_ATTR,            
    SPI_CTRL_SELECT_SLAVE,              
    SPI_CTRL_CHECK_FIFO_BUSY,           
#if defined(CONFIG_SPI_SUPPORT_DMA) && (CONFIG_SPI_SUPPORT_DMA == 1)
    SPI_CTRL_SET_DMA_CFG,               
    SPI_CTRL_GET_DMA_DATA_ADDR,         
#endif  /* CONFIG_SPI_SUPPORT_DMA */
 
#if defined(CONFIG_SPI_SUPPORT_INTERRUPT) && (CONFIG_SPI_SUPPORT_INTERRUPT == 1)
    SPI_CTRL_EN_RXFI_INT,               
    SPI_CTRL_CHECK_RX_FIFO_EMPTY,       
    SPI_CTRL_EN_TXEI_INT,               
    SPI_CTRL_CHECK_TX_FIFO_FULL,        
    SPI_CTRL_EN_MULTI_MASTER_ERR_INT,   
#endif  /* CONFIG_SPI_SUPPORT_INTERRUPT */
 
#if defined(CONFIG_SPI_SUPPORT_LPM) && (CONFIG_SPI_SUPPORT_LPM == 1)
    SPI_CTRL_SUSPEND,                   
    SPI_CTRL_RESUME,                    
#endif  /* CONFIG_SPI_SUPPORT_LPM */
    SPI_CTRL_SET_TMOD,                  
    SPI_CTRL_MAX,
    SPI_CTRL_ID_INVALID = 0xFF
} hal_spi_ctrl_id_t;
 
typedef enum hal_spi_cfg_frame_format {
    SPI_CFG_FRAME_FORMAT_MOTOROLA_SPI,      
    SPI_CFG_FRAME_FORMAT_TEXAS_SSP,         
    SPI_CFG_FRAME_FORMAT_NS_MICROWIRE,      
    SPI_CFG_FRAME_FORMAT_MAX
} hal_spi_cfg_frame_format_t;
 
typedef enum hal_spi_cfg_clk_cpol {
    SPI_CFG_CLK_CPOL_0,                     
    SPI_CFG_CLK_CPOL_1,                     
    SPI_CFG_CLK_CPOL_MAX
} hal_spi_cfg_clk_cpol_t;
 
typedef enum hal_spi_cfg_clk_cpha {
    SPI_CFG_CLK_CPHA_0,                     
    SPI_CFG_CLK_CPHA_1,                     
    SPI_CFG_CLK_CPHA_MAX
} hal_spi_cfg_clk_cpha_t;
 
typedef enum hal_spi_cfg_sste {
    SPI_CFG_SSTE_DISABLE,                   
    SPI_CFG_SSTE_ENABLE,                    
    SPI_CFG_SSTE_MAX
} hal_spi_cfg_sste_t;
 
typedef enum hal_spi_trans_mode {
    HAL_SPI_TRANS_MODE_TXRX = 0,            
    HAL_SPI_TRANS_MODE_TX,                  
    HAL_SPI_TRANS_MODE_RX,                  
    HAL_SPI_TRANS_MODE_EEPROM,              
    HAL_SPI_TRANS_MODE_MAX
} hal_spi_trans_mode_t;
 
typedef enum hal_spi_frame_size {
    HAL_SPI_FRAME_SIZE_8    = 0x07,         
    HAL_SPI_FRAME_SIZE_16   = 0x0F,         
    HAL_SPI_FRAME_SIZE_24   = 0x17,         
    HAL_SPI_FRAME_SIZE_32   = 0x1F          
} hal_spi_frame_size_t;
 
typedef enum hal_spi_frame_format {
    HAL_SPI_FRAME_FORMAT_STANDARD = 0,      
    HAL_SPI_FRAME_FORMAT_DUAL,              
    HAL_SPI_FRAME_FORMAT_QUAD,              
    HAL_SPI_FRAME_FORMAT_OCTAL,             
    HAL_SPI_FRAME_FORMAT_DOUBLE_OCTAL,      
    HAL_SPI_FRAME_FORMAT_SIXT,
    HAL_SPI_FRAME_FORMAT_MAX_NUM,
    HAL_SPI_FRAME_FORMAT_NONE = HAL_SPI_FRAME_FORMAT_MAX_NUM
} hal_spi_frame_format_t;
 
typedef enum hal_spi_trans_type {
    HAL_SPI_TRANS_TYPE_INST_S_ADDR_S = 0,   
    HAL_SPI_TRANS_TYPE_INST_S_ADDR_Q,       
    HAL_SPI_TRANS_TYPE_INST_Q_ADDR_Q,       
    HAL_SPI_TRANS_TYPE_MAX = HAL_SPI_TRANS_TYPE_INST_Q_ADDR_Q
} hal_spi_trans_type_t;
 
typedef enum hal_spi_inst_len {
    HAL_SPI_INST_LEN_0 = 0,                 
    HAL_SPI_INST_LEN_4,                     
    HAL_SPI_INST_LEN_8,                     
    HAL_SPI_INST_LEN_16,                    
    HAL_SPI_INST_LEN_MAX = HAL_SPI_INST_LEN_16
} hal_spi_inst_len_t;
 
typedef enum hal_spi_addr_len {
    HAL_SPI_ADDR_LEN_0 = 0,                 
    HAL_SPI_ADDR_LEN_4,                     
    HAL_SPI_ADDR_LEN_8,                     
    HAL_SPI_ADDR_LEN_12,                    
    HAL_SPI_ADDR_LEN_16,                    
    HAL_SPI_ADDR_LEN_20,                    
    HAL_SPI_ADDR_LEN_24,                    
    HAL_SPI_ADDR_LEN_28,                    
    HAL_SPI_ADDR_LEN_32,                    
    HAL_SPI_ADDR_LEN_36,                    
    HAL_SPI_ADDR_LEN_40,                    
    HAL_SPI_ADDR_LEN_44,                    
    HAL_SPI_ADDR_LEN_48,                    
    HAL_SPI_ADDR_LEN_52,                    
    HAL_SPI_ADDR_LEN_56,                    
    HAL_SPI_ADDR_LEN_60,                    
    HAL_SPI_ADDR_LEN_MAX = HAL_SPI_ADDR_LEN_60
} hal_spi_addr_len_t;
 
typedef enum hal_spi_evt_id {
    SPI_EVT_RX_FULL_ISR,           
    SPI_EVT_RX_OVERFLOW_ISR,       
    SPI_EVT_RX_UNDERFLOW_ISR,      
    SPI_EVT_TX_EMPTY_ISR,          
    SPI_EVT_TX_OVERFLOW_ISR,       
    SPI_EVT_MULTI_MASTER_ISR       
} hal_spi_evt_id_t;
 
typedef struct hal_spi_xfer_qspi_param {
    hal_spi_trans_type_t trans_type;  
    hal_spi_inst_len_t   inst_len;    
    hal_spi_addr_len_t   addr_len;    
    uint32_t             wait_cycles; 
} hal_spi_xfer_qspi_param_t;
 
typedef struct hal_spi_xfer_sspi_param {
    uint32_t             wait_cycles; 
} hal_spi_xfer_sspi_param_t;
 
typedef struct hal_spi_attr {
    bool is_slave;                      
    uint32_t slave_num;                 
    uint32_t bus_clk;                   
    uint32_t freq_mhz;                  
    uint32_t clk_polarity;              
    uint32_t clk_phase;                 
    uint32_t frame_format;              
    uint32_t spi_frame_format;          
    uint32_t frame_size;                
    uint32_t tmod;                      
    uint32_t ndf;                       
    uint32_t sste;                      
} hal_spi_attr_t;
 
typedef struct hal_spi_extra_attr {
    bool tx_use_dma;                        
    bool rx_use_dma;                        
    hal_spi_xfer_qspi_param_t qspi_param;   
    hal_spi_xfer_sspi_param_t sspi_param;   
} hal_spi_extra_attr_t;
 
typedef struct hal_spi_xfer_data {
    uint8_t *tx_buff;       
    uint32_t tx_bytes;      
    uint8_t *rx_buff;       
    uint32_t rx_bytes;      
    uint8_t cmd;            
    uint8_t reserved[3];    
    uint32_t addr;          
} hal_spi_xfer_data_t;
 
#if defined(CONFIG_SPI_SUPPORT_DMA) && (CONFIG_SPI_SUPPORT_DMA == 1)
typedef struct hal_spi_dma_cfg_param {
    bool                 is_enable;     
    uint8_t              dma_rx_level;  
    uint8_t              dma_tx_level;  
} hal_spi_dma_cfg_param_t;
#endif  /* CONFIG_SPI_SUPPORT_DMA */
 
typedef errcode_t (*hal_spi_callback_t)(spi_bus_t bus, hal_spi_evt_id_t evt, uintptr_t param);
 
typedef errcode_t (*hal_spi_ctrl_t)(spi_bus_t bus, hal_spi_ctrl_id_t id, uintptr_t param);
 
errcode_t hal_spi_init(spi_bus_t bus, const hal_spi_attr_t *attr,
                       const hal_spi_extra_attr_t *extra_attr, hal_spi_callback_t callback);
 
errcode_t hal_spi_deinit(spi_bus_t bus);
 
errcode_t hal_spi_write(spi_bus_t bus, hal_spi_xfer_data_t *data, uint32_t timeout);
 
errcode_t hal_spi_read(spi_bus_t bus, hal_spi_xfer_data_t *data, uint32_t timeout);
 
errcode_t hal_spi_ctrl(spi_bus_t bus, hal_spi_ctrl_id_t id, uintptr_t param);
 
errcode_t hal_spi_regs_init(void);
 
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
 
#endif