timers_v150_regs结构体 参考

Registers associated with common timer. 更多...

#include <hal_timer_v150_regs_def.h>

成员变量
volatile uint32_t	lock
volatile uint32_t	vmid_en
volatile uint32_t	comm_vmid
volatile uint32_t	comm_reserved
volatile uint32_t	chgi_vmid [8]
volatile uint32_t	chgi_idx [16]
volatile uint32_t	abnor_intr_raw
volatile uint32_t	abnor_imsk
volatile uint32_t	abnor_intr_stat
volatile uint32_t	abnor_reserved1
volatile uint32_t	abnor_reserved2
volatile uint32_t	intr_wth
volatile uint32_t	eoi_ren
volatile uint32_t	raw_intr_stat
volatile uint32_t	intr_stat
volatile uint32_t	lp_state
volatile uint32_t	status

详细描述

Registers associated with common timer.

结构体成员变量说明

abnor_imsk

volatile uint32_t timers_v150_regs::abnor_imsk

Timer vmid check error mask interrupt registers. Offset: 64h.

abnor_intr_raw

volatile uint32_t timers_v150_regs::abnor_intr_raw

Timer raw interrupt registers in vimd check. Offset: 60h.

abnor_intr_stat

volatile uint32_t timers_v150_regs::abnor_intr_stat

Timer vmid check error interrupt status registers. Offset: 68h.

abnor_reserved1

volatile uint32_t timers_v150_regs::abnor_reserved1

reserved. Offset: 6Ch.

abnor_reserved2

volatile uint32_t timers_v150_regs::abnor_reserved2

reserved. Offset: 70h.

chgi_idx

volatile uint32_t timers_v150_regs::chgi_idx

Timer n channel group ID. Offset: 30h.

chgi_vmid

volatile uint32_t timers_v150_regs::chgi_vmid

Timer vmid permission check registers for channel group. Offset: 10h.

comm_reserved

volatile uint32_t timers_v150_regs::comm_reserved

reserved. Offset: 0Ch.

comm_vmid

volatile uint32_t timers_v150_regs::comm_vmid

Timer COMM vmid permission check registers. Offset: 08h.

eoi_ren

volatile uint32_t timers_v150_regs::eoi_ren

All timer interrupt clear registers. Offset: 78h.

intr_stat

volatile uint32_t timers_v150_regs::intr_stat

All timer interrupt status after mask. Offset: 80h.

intr_wth

volatile uint32_t timers_v150_regs::intr_wth

Timer interrupt width registers. Offset: 74h.

lock

volatile uint32_t timers_v150_regs::lock

Timer write lock/unlock registers. Offset: 00h.

lp_state

volatile uint32_t timers_v150_regs::lp_state

Low power status indicator registers. Offset: 84h.

raw_intr_stat

volatile uint32_t timers_v150_regs::raw_intr_stat

All timer raw interrupt status registers. Offset: 7Ch.

status

volatile uint32_t timers_v150_regs::status

Low power status registers. Offset: 88h.

vmid_en

volatile uint32_t timers_v150_regs::vmid_en

Timer vmid enable check registers. Offset: 04h.

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该结构体的文档由以下文件生成:

• src/drivers/chips/ws63/rom/drivers/drivers/hal/timer/v150/hal_timer_v150_regs_def.h
• src/drivers/drivers/hal/timer/v150/hal_timer_v150_regs_def.h