watchdog_porting.h

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#ifndef WATCHDOG_PORTING_H
#define WATCHDOG_PORTING_H
 
#include <stdint.h>
 
#define CONFIG_WDT_CLOCK    24000000 /* wdg的fpga时钟周期为24mhz */
#define WDT_CNT_WIDTH       32
 
typedef void (*hal_chip_watchdog_dump_callback_t)(void);
typedef enum {
    CHIP_WDT_TIMEOUT_2S = 2,  // WDT period is 2s.
    CHIP_WDT_TIMEOUT_4S = 4,
    CHIP_WDT_TIMEOUT_8S = 8,
    CHIP_WDT_TIMEOUT_16S = 16,
    CHIP_WDT_TIMEOUT_32S = 32,
    CHIP_WDT_TIMEOUT_64S = 64,
    CHIP_WDT_TIMEOUT_128S = 128,
    CHIP_WDT_TIMEOUT_256S = 256,
    CHIP_WDT_TIMEOUT_512S = 512,
    CHIP_WDT_TIMEOUT_1024S = 1024,
    CHIP_WDT_TIMEOUT_2048S = 2048,
    CHIP_WDT_TIMEOUT_4096S = 4096,
    CHIP_WDT_TIMEOUT_8192S = 8192,
    CHIP_WDT_TIMEOUT_16384S = 16384,
    CHIP_WDT_TIMEOUT_32768S = 32768,
    CHIP_WDT_TIMEOUT_MAX,
} chip_wdt_timeout_t;
 
typedef enum {
    CHIP_WDT_MODE_RESET = 0,  // Will reset core direcotry, when chip watchdog trigger.
    // Will enter interrupt, when chip watchdog trigger. If chip watchdog not kick in interrupt, core will reset.
    CHIP_WDT_MODE_INTERRUPT,
    CHIP_WDT_MODE_MAX,
} chip_wdt_mode_t;
 
 
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
 
extern uintptr_t g_watchdog_base_addr;
 
void watchdog_port_register_hal_funcs(void);
 
void watchdog_port_unregister_hal_funcs(void);
 
void watchdog_port_register_irq(void);
 
void irq_wdt_handler(void);
 
void watchdog_turnon_clk(void);
 
void watchdog_turnoff_clk(void);
 
uint32_t watchdog_get_configtime(void);
 
void watchdog_port_set_clock(uint32_t wdt_clock);
 
uint32_t watchdog_port_get_clock(void);
 
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
 
#endif