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hcc_ipc_adapt.h
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1/*
2 * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
3 * Description: the header file for hcc ipc adapt layer.
4 */
5#ifndef HCC_IPC_ADAPT_H
6#define HCC_IPC_ADAPT_H
7
8#include "td_type.h"
9#include "hcc_bus.h"
10#include "hcc_queue.h"
11#include "hcc_cfg_comm.h"
12
13#ifdef __cplusplus
14#if __cplusplus
15extern "C" {
16#endif
17#endif
18
19#ifdef CONFIG_HCC_SUPPORT_IPC
20
21#define IPC_MEM_MSG_MAX 4
22#define HCC_PREMEM_LEN 4
23#define HCC_LOSS_MEM_MAX 8
24#define IPC_MAX_XFER_LEN 2048
25
26#define IPC_CHAN_DATA 0
27#define IPC_CHAN_MSG 1
28
29#define IPC_MEM_PRIV_MSG_FLAG 0x5A
30#define IPC_MEM_PRIV_MSG_FLAG_OFFSET 8
31#define IPC_MEM_PRIV_MSG (IPC_MEM_PRIV_MSG_FLAG << IPC_MEM_PRIV_MSG_FLAG_OFFSET)
32
33enum {
34 HCC_IPC_MEM_REQUEST = 1,
35 HCC_IPC_MEM_REPLY,
36 HCC_IPC_MEM_TX_COMPLETE,
37 HCC_IPC_MEM_RX_START,
38 HCC_IPC_MEM_RX_COMPLETE,
39 HCC_IPC_MEM_PRIV_MSG = IPC_MEM_PRIV_MSG,
40 HCC_IPC_MEM_CLEAR_PREMEM,
41};
42
43typedef struct hcc_ipc_mem_request {
44 td_u8 type;
45 td_u8 hcc_queue_id;
46 td_u8 cnt;
47 td_u8 rsv;
48 td_u16 data_len[IPC_MEM_MSG_MAX];
49} hcc_ipc_mem_request_t;
50
51typedef struct hcc_ipc_mem_reply {
52 td_u8 type;
53 td_u8 hcc_queue_id;
54 td_u8 cnt;
55 td_u8 rsv;
56 td_u16 data_len[IPC_MEM_MSG_MAX];
57 td_u8 *addr[IPC_MEM_MSG_MAX];
58} hcc_ipc_mem_reply_t;
59
60typedef struct hcc_ipc_mem_complete {
61 td_u8 type;
62 td_u8 hcc_queue_id;
63 td_u8 cnt;
64 td_u8 rsv;
65 td_u8 *addr[IPC_MEM_MSG_MAX];
66} hcc_ipc_mem_complete_t;
67
68typedef struct hcc_ipc_cfg {
69 td_u8 premem_len;
70 td_u8 lossmem_max;
71} hcc_ipc_cfg_t;
72
74hcc_bus *hcc_adapt_ipc_load(hcc_handler *hcc);
75td_void hcc_adapt_ipc_unload(td_void);
76td_bool hcc_ipc_tx_dma_is_busy(hcc_queue_dir dir, hcc_trans_queue *queue);
77td_void hcc_ipc_flowctrl_on(hcc_bus *hcc_bus, td_bool unc_check);
78td_void hcc_ipc_flowctrl_off(hcc_bus *hcc_bus, td_bool force_check);
79td_s32 hcc_adapt_ipc_cfg(hcc_ipc_cfg_t *cfg);
80bus_dev_ops* hcc_ipc_get_bus_ops(td_void);
81#endif /* CONFIG_HCC_SUPPORT_IPC */
83
84static inline td_bool hcc_check_pre_req_queue(TD_CONST hcc_trans_queue *queue)
85{
86 return queue->queue_ctrl->transfer_mode == HCC_IPC_TRANS_PREMEM;
87}
89
90#ifdef __cplusplus
91#if __cplusplus
92}
93#endif
94#endif
95
96#endif /* HCC_IPC_ADAPT_H */
@ HCC_IPC_TRANS_PREMEM
Definition hcc_cfg_comm.h:34
td_void hcc_ipc_complement_mem(td_void)
td_void hcc_ipc_clear_premem(td_void)
struct osal_list_head * hcc_ipc_get_pre_mem_list(td_u8 queue_id)
enum _hcc_queue_dir_ hcc_queue_dir
osal_u8 type
Definition oal_net.h:0
osal_u8 rsv[3]
Definition oal_net.h:2
Definition hcc_bus_types.h:58
Definition hcc_bus_types.h:91
Definition hcc.h:81
Definition hcc_queue.h:41
Definition osal_list.h:39
#define TD_CONST
Definition td_base.h:18
unsigned short td_u16
Definition td_type.h:37
unsigned char td_u8
Definition td_type.h:36
td_u8 td_bool
Definition td_type.h:50
void td_void
Definition td_type.h:49
int td_s32
Definition td_type.h:44